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First Machine, can't get 6i25 to drive CL57Y/CL86Y
- Autumn Reign
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11 months 2 weeks ago #338555
by Autumn Reign
Replied by Autumn Reign on topic First Machine, can't get 6i25 to drive CL57Y/CL86Y
General configuration information:
BoardName : MESA5I25
FPGA Size: 9 KGates5
FPGA Pins: 144
Number of IO Ports: 2
Width of one I/O port: 17
Clock Low frequency: 33.3333 MHz
Clock High frequency: 200.0000 MHz
IDROM Type: 3
Instance Stride 0: 4
Instance Stride 1: 64
Register Stride 0: 256
Register Stride 1: 256
Modules in configuration:
Module: WatchDog
There are 1 of WatchDog in configuration
Version: 0
Registers: 3
BaseAddress: 0C00
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: IOPort
There are 2 of IOPort in configuration
Version: 0
Registers: 5
BaseAddress: 1000
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: QCount
There are 2 of QCount in configuration
Version: 2
Registers: 5
BaseAddress: 3000
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: SSerial
There are 1 of SSerial in configuration
Version: 0
Registers: 6
BaseAddress: 5B00
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 64 bytes
Module: StepGen
There are 10 of StepGen in configuration
Version: 2
Registers: 10
BaseAddress: 2000
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: LED
There are 1 of LED in configuration
Version: 0
Registers: 1
BaseAddress: 0200
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Configuration pin-out:
IO Connections for P3
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
1 0 IOPort StepGen 0 Dir/Table2 (Out)
14 1 IOPort StepGen 0 Step/Table1 (Out)
2 2 IOPort StepGen 1 Dir/Table2 (Out)
15 3 IOPort StepGen 1 Step/Table1 (Out)
3 4 IOPort StepGen 2 Dir/Table2 (Out)
16 5 IOPort StepGen 2 Step/Table1 (Out)
4 6 IOPort StepGen 3 Dir/Table2 (Out)
17 7 IOPort StepGen 3 Step/Table1 (Out)
5 8 IOPort StepGen 4 Dir/Table2 (Out)
6 9 IOPort StepGen 4 Step/Table1 (Out)
7 10 IOPort SSerial 0 TXData0 (Out)
8 11 IOPort SSerial 0 RXData0 (In)
9 12 IOPort SSerial 0 TXData1 (Out)
10 13 IOPort SSerial 0 RXData1 (In)
11 14 IOPort QCount 0 Quad-IDX (In)
12 15 IOPort QCount 0 Quad-B (In)
13 16 IOPort QCount 0 Quad-A (In)
IO Connections for P2
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
1 17 IOPort StepGen 5 Dir/Table2 (Out)
14 18 IOPort StepGen 5 Step/Table1 (Out)
2 19 IOPort StepGen 6 Dir/Table2 (Out)
15 20 IOPort StepGen 6 Step/Table1 (Out)
3 21 IOPort StepGen 7 Dir/Table2 (Out)
16 22 IOPort StepGen 7 Step/Table1 (Out)
4 23 IOPort StepGen 8 Dir/Table2 (Out)
17 24 IOPort StepGen 8 Step/Table1 (Out)
5 25 IOPort StepGen 9 Dir/Table2 (Out)
6 26 IOPort StepGen 9 Step/Table1 (Out)
7 27 IOPort SSerial 0 TXData2 (Out)
8 28 IOPort SSerial 0 RXData2 (In)
9 29 IOPort SSerial 0 TXData3 (Out)
10 30 IOPort SSerial 0 RXData3 (In)
11 31 IOPort QCount 1 Quad-IDX (In)
12 32 IOPort QCount 1 Quad-B (In)
13 33 IOPort QCount 1 Quad-A
When using:
setp hm2_5i25.0.stepgen.03.direction.invert_output
setp hm2_5i25.0.stepgen.03.step.invert_output
Results:
Debug file information:
Note: Using POSIX realtime
./Autumn.hal:240: setp requires 2 arguments, 1 given
12304
Stopping realtime threads
Unloading hal components
RTAPI_PCI: Unmapped 65536 bytes at 0x7f370745c000
Note: Using POSIX realtime
But:
setp hm2_5i25.0.stepgen.03.direction.invert_output TRUE
setp hm2_5i25.0.stepgen.03.step.invert_output TRUE
Executes and launches
BoardName : MESA5I25
FPGA Size: 9 KGates5
FPGA Pins: 144
Number of IO Ports: 2
Width of one I/O port: 17
Clock Low frequency: 33.3333 MHz
Clock High frequency: 200.0000 MHz
IDROM Type: 3
Instance Stride 0: 4
Instance Stride 1: 64
Register Stride 0: 256
Register Stride 1: 256
Modules in configuration:
Module: WatchDog
There are 1 of WatchDog in configuration
Version: 0
Registers: 3
BaseAddress: 0C00
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: IOPort
There are 2 of IOPort in configuration
Version: 0
Registers: 5
BaseAddress: 1000
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: QCount
There are 2 of QCount in configuration
Version: 2
Registers: 5
BaseAddress: 3000
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: SSerial
There are 1 of SSerial in configuration
Version: 0
Registers: 6
BaseAddress: 5B00
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 64 bytes
Module: StepGen
There are 10 of StepGen in configuration
Version: 2
Registers: 10
BaseAddress: 2000
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: LED
There are 1 of LED in configuration
Version: 0
Registers: 1
BaseAddress: 0200
ClockFrequency: 33.333 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Configuration pin-out:
IO Connections for P3
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
1 0 IOPort StepGen 0 Dir/Table2 (Out)
14 1 IOPort StepGen 0 Step/Table1 (Out)
2 2 IOPort StepGen 1 Dir/Table2 (Out)
15 3 IOPort StepGen 1 Step/Table1 (Out)
3 4 IOPort StepGen 2 Dir/Table2 (Out)
16 5 IOPort StepGen 2 Step/Table1 (Out)
4 6 IOPort StepGen 3 Dir/Table2 (Out)
17 7 IOPort StepGen 3 Step/Table1 (Out)
5 8 IOPort StepGen 4 Dir/Table2 (Out)
6 9 IOPort StepGen 4 Step/Table1 (Out)
7 10 IOPort SSerial 0 TXData0 (Out)
8 11 IOPort SSerial 0 RXData0 (In)
9 12 IOPort SSerial 0 TXData1 (Out)
10 13 IOPort SSerial 0 RXData1 (In)
11 14 IOPort QCount 0 Quad-IDX (In)
12 15 IOPort QCount 0 Quad-B (In)
13 16 IOPort QCount 0 Quad-A (In)
IO Connections for P2
DB25 pin# I/O Pri. func Sec. func Chan Sec. Pin func Sec. Pin Dir
1 17 IOPort StepGen 5 Dir/Table2 (Out)
14 18 IOPort StepGen 5 Step/Table1 (Out)
2 19 IOPort StepGen 6 Dir/Table2 (Out)
15 20 IOPort StepGen 6 Step/Table1 (Out)
3 21 IOPort StepGen 7 Dir/Table2 (Out)
16 22 IOPort StepGen 7 Step/Table1 (Out)
4 23 IOPort StepGen 8 Dir/Table2 (Out)
17 24 IOPort StepGen 8 Step/Table1 (Out)
5 25 IOPort StepGen 9 Dir/Table2 (Out)
6 26 IOPort StepGen 9 Step/Table1 (Out)
7 27 IOPort SSerial 0 TXData2 (Out)
8 28 IOPort SSerial 0 RXData2 (In)
9 29 IOPort SSerial 0 TXData3 (Out)
10 30 IOPort SSerial 0 RXData3 (In)
11 31 IOPort QCount 1 Quad-IDX (In)
12 32 IOPort QCount 1 Quad-B (In)
13 33 IOPort QCount 1 Quad-A
When using:
setp hm2_5i25.0.stepgen.03.direction.invert_output
setp hm2_5i25.0.stepgen.03.step.invert_output
Results:
Debug file information:
Note: Using POSIX realtime
./Autumn.hal:240: setp requires 2 arguments, 1 given
12304
Stopping realtime threads
Unloading hal components
RTAPI_PCI: Unmapped 65536 bytes at 0x7f370745c000
Note: Using POSIX realtime
But:
setp hm2_5i25.0.stepgen.03.direction.invert_output TRUE
setp hm2_5i25.0.stepgen.03.step.invert_output TRUE
Executes and launches
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11 months 2 weeks ago #338559
by PCW
Replied by PCW on topic First Machine, can't get 6i25 to drive CL57Y/CL86Y
Note that that is the default (as shipped) firmware, not the 5ABOB firmware
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- Autumn Reign
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11 months 2 weeks ago #338583
by Autumn Reign
Replied by Autumn Reign on topic First Machine, can't get 6i25 to drive CL57Y/CL86Y
Yeah. Reviewing my notes its 5i25_7i76x2.
I think I just got something to click looking at these with fresh ideas. on Pncconf under the "Num" column that's not the DB25 pin, but IO number, so when I have my config configured for 7i76x2 and I want I/O 7 for Z Axis Stepgen, my joint3, that's actually Pin 17 on the DB25... I totally thought it was all mapped 1 to 1.
I think I just got something to click looking at these with fresh ideas. on Pncconf under the "Num" column that's not the DB25 pin, but IO number, so when I have my config configured for 7i76x2 and I want I/O 7 for Z Axis Stepgen, my joint3, that's actually Pin 17 on the DB25... I totally thought it was all mapped 1 to 1.
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11 months 2 weeks ago #338584
by Autumn Reign
Replied by Autumn Reign on topic First Machine, can't get 6i25 to drive CL57Y/CL86Y
Yep. That was it. God I do not feel bright. Thanks for the help on this.
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