DPLL configuration
11 Apr 2018 15:31 #108818
by Clive S
DPLL configuration was created by Clive S
On my journey into getting a encoder to work with PathPilot I have used a 7i85s board connected to the P2 on the 5i25.
Peter (PCW) kindly made me a bit file to suite. This section in the hal file:-
# DPLL configuration
##########setp hm2_[HOSTMOT2](BOARD).0.dpll.01.timer-us [HOSTMOT2](DPLL_TIMER_US)
# default is -1 which means don't use the DPLL timer and simply sample on read()
# set to 1 for Ethernet boards to use DPLL timer 1 and sample 100 micro seconds
# before the nominal servo thread read() time
###########setp hm2_[HOSTMOT2](BOARD).0.stepgen.timer-number [HOSTMOT2](DPLL_TIMER_NUMBER)
# currently the mill has no encoders enabled (RapidTurn does) so this cannot be enabled
# left here as a reminder that it exists
#setp hm2_[HOSTMOT2](BOARD).0.encoder.timer-number [HOSTMOT2](DPLL_TIMER_NUMBER)
I have had to comment out the two lines above to stop the code producing an error. The program seems to run fine with this.
So is it OK to run it like this ie with the code commented out?
Peter (PCW) kindly made me a bit file to suite. This section in the hal file:-
# DPLL configuration
##########setp hm2_[HOSTMOT2](BOARD).0.dpll.01.timer-us [HOSTMOT2](DPLL_TIMER_US)
# default is -1 which means don't use the DPLL timer and simply sample on read()
# set to 1 for Ethernet boards to use DPLL timer 1 and sample 100 micro seconds
# before the nominal servo thread read() time
###########setp hm2_[HOSTMOT2](BOARD).0.stepgen.timer-number [HOSTMOT2](DPLL_TIMER_NUMBER)
# currently the mill has no encoders enabled (RapidTurn does) so this cannot be enabled
# left here as a reminder that it exists
#setp hm2_[HOSTMOT2](BOARD).0.encoder.timer-number [HOSTMOT2](DPLL_TIMER_NUMBER)
I have had to comment out the two lines above to stop the code producing an error. The program seems to run fine with this.
So is it OK to run it like this ie with the code commented out?
The following user(s) said Thank You: snowgoer540
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11 Apr 2018 15:42 #108819
by PCW
Replied by PCW on topic DPLL configuration
Typically our PCI card configurations do not have the DPLL built in.
The DPLL function is to reduce input sampling jitter (in this case time jitter in reading the stepgen and encoder positions)
Ethernet systems tend to have more jitter than PCI (up to 100s of usec) so the DPLL is of more use there.
Unless your PC has very bad jitter figures (say worse than 200 usec) or you have very high accuracy requirements
at high speeds, I doubt you would notice the effect of the DPLL on a PCI system.
The DPLL function is to reduce input sampling jitter (in this case time jitter in reading the stepgen and encoder positions)
Ethernet systems tend to have more jitter than PCI (up to 100s of usec) so the DPLL is of more use there.
Unless your PC has very bad jitter figures (say worse than 200 usec) or you have very high accuracy requirements
at high speeds, I doubt you would notice the effect of the DPLL on a PCI system.
The following user(s) said Thank You: Clive S, snowgoer540
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23 Feb 2021 18:38 - 23 Feb 2021 19:01 #199873
by creisey
Replied by creisey on topic DPLL configuration
is in the wrong topici set to FERROR = 0.08 and it works. thx a lot
Last edit: 23 Feb 2021 19:01 by creisey.
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