Which version Xilinx ISE to build hostmot2 firmware?

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09 Feb 2017 16:59 #87679 by jCandlish
What is the correct Xilinx ISE software for building hostmot2 firmares?

It is taking forever to download version 13.4 for linux. The download keeps hanging at about 600MB.

Alternatively, where does one find hostmot2 debian packages? They show as 'recommended' in aptitude but are missing from the buildbot.

Thanks!

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09 Feb 2017 17:37 #87681 by PCW
Anything from 13.x to 14.7 (the last ISE release) should be fine
Vivado should work also but is probably even a bigger download

(i'm using 14.7 on Ubuntu)
The following user(s) said Thank You: jCandlish

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10 Feb 2017 12:03 #87756 by jCandlish
OK. I've downloaded and licensed ISE version 14.7

I've cloned hostmot2-firmware from github.

I've made exactly two changes to the github code:

The first change adds ISE major version 14 to the debian/rules script.
The second change uses settings64.sh rather than settings32.sh.

Running 'fakeroot debian/rules binary' from the hostmot2-firmware directory ends abnormally in the HDL Compilation phase of 'fw/3x20-1/SV24.BIT'.

ERROR:HDLParsers - Cannot rename dependency database for library "work", file is "work_syn/work/hdpdeps.ref", Temporary database file "/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/fw/3x20-1/SV24_work/work_syn/work/xil_9s1XNK" will remain. System error message is: No such file or directory

... very many lines cut ...

Generating Pad Report.

All signals are completely routed.

WARNING:Par:283 - There are 2 loadless signals in this design. This design will cause Bitgen to issue DRC warnings.

Total REAL time to PAR completion: 46 secs 
Total CPU time to PAR completion: 47 secs 

Peak Memory Usage:  698 MB

Placer: Placement generated during map.
Routing: Completed - No errors found.
Timing: Completed - No errors found.

Number of error messages: 0
Number of warning messages: 4
Number of info messages: 0

Writing design to file work.ncd



PAR done!
# exited with 0
# bash -c '. /opt/Xilinx/14.7/ISE_DS/settings64.sh; bitgen -intstyle ise -w -g 'next_config_register_write:disable' -g 'DebugBitstream:No' -g 'Binary:no' -g 'CRC:Enable' -g 'Reset_on_err:Yes' -g 'ConfigRate:26' -g 'ProgPin:PullUp' -g 'TckPin:PullUp' -g 'TdiPin:PullUp' -g 'TdoPin:PullUp' -g 'TmsPin:PullUp' -g 'UnusedPin:PullDown' -g 'UserID:0xFFFFFFFF' -g 'ExtMasterCclk_en:No' -g 'SPI_buswidth:1' -g 'TIMER_CFG:0xFFFF' -g 'multipin_wakeup:No' -g 'StartUpClk:CClk' -g 'DONE_cycle:6' -g 'GTS_cycle:5' -g 'GWE_cycle:4' -g 'LCK_cycle:NoWait' -g 'Security:None' -g 'DonePipe:No' -g 'DriveDone:No' -g 'en_sw_gsr:No' -g 'drive_awake:No' -g 'sw_clk:Startupclk' -g 'sw_gwe_cycle:5' -g 'sw_gts_cycle:4' work.ncd work.bit work.pcf'
. /home/latheoperator/dev/Xilinx/14.7/ISE_DS/common/.settings64.sh /home/latheoperator/dev/Xilinx/14.7/ISE_DS/common
. /home/latheoperator/dev/Xilinx/14.7/ISE_DS/EDK/.settings64.sh /home/latheoperator/dev/Xilinx/14.7/ISE_DS/EDK
. /home/latheoperator/dev/Xilinx/14.7/ISE_DS/PlanAhead/.settings64.sh /home/latheoperator/dev/Xilinx/14.7/ISE_DS/PlanAhead
. /home/latheoperator/dev/Xilinx/14.7/ISE_DS/ISE/.settings64.sh /home/latheoperator/dev/Xilinx/14.7/ISE_DS/ISE
WARNING:Bitgen:284 - Setting next_config_register_write to Disable will cause
   the next_config_addr, next_config_new_mode, and next_config_boot_mode options
   to be ignored and their respective register writes to be excluded from the
   bitstream.
INFO:Bitgen:341 - This design is using one or more 9K Block RAMs (RAMB8BWER). 
   9K Block RAM initialization data, both user defined and default, requires a
   special bit stream format.  For more information, please reference Xilinx
   Answer Record 39999.
WARNING:PhysDesignRules:367 - The signal
   <processor/StackRam/Mram_RAM2_RAMD_D1_O> is incomplete. The signal does not
   drive any load pins in the design.
WARNING:PhysDesignRules:367 - The signal
   <processor/StackRam/Mram_RAM1_RAMD_D1_O> is incomplete. The signal does not
   drive any load pins in the design.
INFO:PhysDesignRules:1861 - To achieve optimal frequency synthesis performance
   with the CLKFX and CLKFX180 outputs of the DCM comp ClockMult1, consult the
   device Data Sheet.
INFO:PhysDesignRules:1861 - To achieve optimal frequency synthesis performance
   with the CLKFX and CLKFX180 outputs of the DCM comp ClockMult2, consult the
   device Data Sheet.
WARNING:PhysDesignRules:2410 - This design is using one or more 9K Block RAMs
   (RAMB8BWER).  9K Block RAM initialization data, both user defined and
   default, may be incorrect and should not be used.  For more information,
   please reference Xilinx Answer Record 39999.
# exited with 0
0:37.9-xst         0:10.8-ngdbuild    1:27.0-map         0:50.6-par         0:22.8-bitgen      0:22.8-total

scripts/build.py x20_1000 SV24_144 fw/3x20-1/SV24.BIT
localsettings =  /home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/settings14.sh
using Xilinx Webpack settings '/opt/Xilinx/14.7/ISE_DS/settings64.sh'
# workdir /home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/fw/3x20-1/SV24_work
/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/Top9054HostMot2.vhd /home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/fw/3x20-1/SV24.vhd
['/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/IDROMConst.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/atrans.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/adpram.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/biss.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/boutreg.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/bufferedspi.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/PinExists.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/CountPinsInRange.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/d8o8.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/dpll.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/fanucabs.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/hmtimers.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/hostmotid.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/idrom.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/irqlogic.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/irqlogics.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/InputPinsPerModule.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/kubstepgenz.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/MaxPinsPerModule.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/NumberOfModules.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/pktuartr.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/pktuartx.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/pwmpdmgenh.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/pwmrefh.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/qcounterate.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/qcountersfp.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/qcountersf.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/qcounteratesk.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/scalercounter.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/scalertimer.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/simplespi8.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/simplespix.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/simplessi.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/srl16delay.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/sslbpram.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/testram.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/testrom.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/threephasepwm.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/timestamp.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/uartr8.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/uartr.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/uartx8.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/uartx.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/ubrategen.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/usbram.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/usbrom.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/watchdog.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/wordpr.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/wordrb.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/parity.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/decodedstrobe2.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/MaxIOPinsPerModule.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/MaxInputPinsPerModule.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/MaxOutputPinsPerModule.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/ModuleExists.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/OutputInteg.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/b32qcondmac2w.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/binosc.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/d8o8sq.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/d8o8sqw.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/d8o8sqws.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/daqfifo16.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/decodedstrobe.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/dpram.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/drqlogic.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/kubstepgenzi.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/log2.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/oneofndecode.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/resolver.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/resolverdaq2.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/resrom.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/resroms.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/sine16.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/sserial.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/sserialwa.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/sslbprom.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/syncwavegen.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/twiddle.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/twidrom.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/wavegen.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/waveram.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/fixicap.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/d16w.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/etherhm2.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/hostmot2.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/x20_1000card.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/src/PIN_SV24_144.vhd', '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/fw/3x20-1/SV24.vhd']
# bash -c '. /opt/Xilinx/14.7/ISE_DS/settings64.sh; xst -intstyle ise -ifn scr'
. /home/latheoperator/dev/Xilinx/14.7/ISE_DS/common/.settings64.sh /home/latheoperator/dev/Xilinx/14.7/ISE_DS/common
. /home/latheoperator/dev/Xilinx/14.7/ISE_DS/EDK/.settings64.sh /home/latheoperator/dev/Xilinx/14.7/ISE_DS/EDK
. /home/latheoperator/dev/Xilinx/14.7/ISE_DS/PlanAhead/.settings64.sh /home/latheoperator/dev/Xilinx/14.7/ISE_DS/PlanAhead
. /home/latheoperator/dev/Xilinx/14.7/ISE_DS/ISE/.settings64.sh /home/latheoperator/dev/Xilinx/14.7/ISE_DS/ISE
Reading design: prj

=========================================================================
*                          HDL Compilation                              *
=========================================================================
ERROR:HDLParsers - Cannot rename dependency database for library "work", file is "work_syn/work/hdpdeps.ref", Temporary database file "/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware/fw/3x20-1/SV24_work/work_syn/work/xil_9s1XNK" will remain.  System error message is:  No such file or directory
--> 


Total memory usage is 489968 kilobytes

Number of errors   :    1 (   0 filtered)
Number of warnings :    0 (   0 filtered)
Number of infos    :    0 (   0 filtered)

# exited with 1536
0:06.7-xst         0:06.7-total

fw/firmwares.mk:7: recipe for target 'fw/3x20-1/SV24.BIT' failed
make[1]: *** [fw/3x20-1/SV24.BIT] Error 6
make[1]: Leaving directory '/home/latheoperator/Downloads/hostmot2-from-github/hostmot2-firmware'
debian/rules:5: recipe for target 'build' failed
make: *** [build] Error 2
latheoperator@125cnc:~/Downloads/hostmot2-from-github/hostmot2-firmware$ 

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10 Feb 2017 15:04 #87766 by jCandlish
Fixed it. Allowing ISE version 14 required changes to two separate files.

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05 Mar 2017 08:04 #89030 by rudydp
I am trying to use ISE 14.7 to change some pin definitions for a 5i25. I use the wiki descriptions for editing bitfiles.

What is not clear from that: one loads the .vhd file that you want to modify, make a copy of it, modify it and save it. Than you add
it to a library (not clear what this does). Then from the design panel click on Top ---- etc. Then scroll down and "CLONE one of the pinout files". What happens here? You have already made a modification to a file. It is not in this list. What should you Clone now?

This last process I cant understand.

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05 Mar 2017 16:13 - 05 Mar 2017 16:16 #89043 by jCandlish
I didn't follow the wiki. I cloned github.com/LinuxCNC/hostmot2-firmware and read the Makefile

I created a new .vhd file by modifying an existing .vhd file in the 'src' directory.

Then I created a new firmwares.txt file in the top directory that pointed to my modified .vhd file and then I executed:

'fakeroot debian/rules binary'

to create a .deb package with my custom firmware.
Last edit: 05 Mar 2017 16:16 by jCandlish.

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05 Mar 2017 22:47 #89066 by PCW
If you use the GUI the reason you need to add the new pinout file to the library
is that this is the only way the build system knows where to look for the source file
(you will notice that in the top level VHDL file that included packages are not
referenced by file name/path but rather the VHDL package name in the source file itself)

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06 Mar 2017 06:10 #89085 by rudydp
Thanks for the feedback on the library question. The other question still remains:

Then from the design panel click on Top ---- etc. (green icon). Then scroll down and "CLONE one of the pinout files". What happens here? You have already made a modification to a file. It is not in this list. What should you Clone now?

This last process I cant understand.

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