Format and type of data passed to Mesa Control Card from LCNC?

More
04 Jul 2019 16:15 - 04 Jul 2019 16:39 #138631 by Wireline
Hi

I am running a 7i92M Anything IO card and a 7i74 breakout board. I would like to understand what information is passed to the board from linuxcnc. For example the manual for the 7i92M states that the protocol is UDP, but also mentions support for Smart Serial. In my current application, I am running hostmot2, so I assume smart serial is being used.

However I don't understand what smart serial actually does and how it is different or complimentary to the UDP protocol. Is there some information on the technical specification of sserial?

Secondly, on this github page github.com/rene-dev/stmbl/blob/master/src/comps/sserial.c what is the purpose of the first array
uint8_t sserial_slave[]
please?

Though I would like to know this information anyway, my practical reason for asking is that I would like to understand if it is possible to write a driver for ROS that can communicate directly with the mesa cards. ROS is quite happy using UDP.

Apologies if this seems vague, I am at the research stage of this project. I am aware that machinekit has a workaround for talking to ROS but I am looking into a native driver and hoping to glean information by learning how LCNC does it.

Thanks!
Last edit: 04 Jul 2019 16:39 by Wireline.

Please Log in or Create an account to join the conversation.

More
04 Jul 2019 17:43 #138637 by PCW
Communication from the host to the 7I92 is UDP(LBP16(HW register access)))

That is, the Ethernet packets are straight IPV4 UDP, and what is transmitted is a simple register access protocol (LBP16) that accesses the hardware registers on the FPGA

SSerial is a high speed serial protocol from the 7I92 to sserial peripherals (like 7I84 etc)

Normally SSerial interfaces are 2.5 Mbit RS-422 links that have a simple remote discovery scheme so that the driver can create LinuxCNC hal pins/parameters based on live discovery information.

The upper levels communicate with sserial devices via a parallel FPGA register set
The following user(s) said Thank You: Wireline

Please Log in or Create an account to join the conversation.

More
04 Jul 2019 20:47 #138643 by Wireline
Thank you that information is extremely useful.

Within the UDP data payload field then, I assume this is where the actual motor commands are carried. I have seen two types of command - position and velocity. Please could you point me towards documentation or source code that explains how the actual motor commands are generated in LCNC and then encoded into a UDP payload?

Thanks again

Please Log in or Create an account to join the conversation.

More
04 Jul 2019 23:21 #138654 by PCW
The motion commands come from LinuxCNCs intepreter --> Trajectory planner

man motion

Documents the hal pins that LinuxCNC presents to hal for connection to
hardware specific pins

The hostmot2 driver does the generic hal pin <-> FPGA register mapping
and the hm2_eth driver does the actual packet composition and unpacking

Please Log in or Create an account to join the conversation.

More
05 Jul 2019 13:35 - 05 Jul 2019 13:37 #138687 by andypugh
The sequence is something like this, assuming a Hostmot2 step generator for the example.

At module load time the "loadrt hostmot2" set up the high-level driver, and then "loadrt hm2_eth" locates the 7i82 on the ethernet port and then the main hostmot2 driver queries the board so see what it has. If it finds a stepgen:
github.com/LinuxCNC/linuxcnc/blob/master...mot2/hostmot2.c#L933
Then it calls the stepgen driver, which creates a HAL pin "hm2_7i92.0.stepgen.00,position-cmd"
github.com/LinuxCNC/linuxcnc/blob/master...tmot2/stepgen.c#L754

G-code G1 X1 F100
Every 1mS the motion component updates the HAL pin joint.0.motor-pos-cmd.

Every servo thread cycle the hm2_read and write functions are called, for each device. So in this example the stepgen driver is called, and the step rate required to reach the new position in the next servo period is converted to an integer value to be sent to a register on the FPGA:
github.com/LinuxCNC/linuxcnc/blob/master...tmot2/stepgen.c#L282
Where the step_rate_reg points to an address on the FPGA calculated as an offset from the stepgen base address based on the FPGA " regmap " file.

All the register value updates are collected from all the modules in the main driver:
github.com/LinuxCNC/linuxcnc/blob/master...mot2/hostmot2.c#L127
github.com/LinuxCNC/linuxcnc/blob/master...tmot2/hm2_eth.c#L738
And then the hm2_eth driver combines the register addresses and values into UDP packets:
(or the PCI driver does it for PCI cards etc etc)

You might have noticed that as well as encoder, stepgen etc functions there is one called "smart serial".
This is what is used to communicate with smart-serial remotes.
So HAL pin values are read by the sserial.c file, converted into FPGA register / value data that is transmitted via UDP (or PCI, or EPP, or SPI) to the FPGA which then comverts the data to the smart-serial protocial that are sent to the smart-serial slave. And then data from the slaves travels back the other direction.

Parts of the sserial.c file look like parts of the hostmot2.c file:
github.com/LinuxCNC/linuxcnc/blob/master...mot2/sserial.c#L1849
Except that the sserial data is simpler so the various data types are handled in one file, rather than being farmed out to sub-drivers as is the case with Hostmot2 modules.


There is an interesting special case, the 7i90 can act either as a Hostmot2 device controlled by EPP parallel port or SPI, or it can be configured as a smart-serial remote.
So it would be possible to have a 7i90 Hostmot2 master on the parallel port connected by CAT5 serial cables to multiple other 7i90 boards configured as smart-serial IO.
Last edit: 05 Jul 2019 13:37 by andypugh.
The following user(s) said Thank You: pommen, Wireline

Please Log in or Create an account to join the conversation.

More
08 Jul 2019 22:10 - 08 Jul 2019 22:22 #138900 by Wireline
Hi Andy

Thank you for such a detailed reply, I will spend some time unpacking it and reading the source. There is a lot more going on there than I appreciated!

I also looked into using wireshark to capture the UDP packets being transmitted to the board, but was only able to retrieve pure hex for the payload. I understand that the UDP Protocol is LBP16 which appears to be a proprietary Mesa protocol, and that I would need a dissector to actually read the payloads for each message.

Is there a dissector for LBP16, or some other way of translating the hex that you know of? I understand its possible to write a dissector but if there is an alternative already available I would be interested!

Thanks again!
Last edit: 08 Jul 2019 22:22 by Wireline.

Please Log in or Create an account to join the conversation.

More
09 Jul 2019 02:28 #138928 by andypugh
LBP16 is documented in the manuals of the ethernet cards

www.mesanet.com/pdf/parallel/7i80dbman.pdf

Page 20.

Please Log in or Create an account to join the conversation.

More
09 Jul 2019 08:10 #138931 by Wireline
Cheers Andy, I have been using that instruction set in the past week but was hoping for a ready-to-go means of translating the packets in wireshark. If there isn't one then no worries.

Please Log in or Create an account to join the conversation.

Time to create page: 0.090 seconds
Powered by Kunena Forum