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Beginners help with latency error / loosing steps
- Todd Zuercher
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Raph wrote: Im on Parallel port.
As a bloody beginner Im hesitant to change any values without knowing what they actually do. Im still reading the manual and sereral posts, and lets just say: it's not a concept that comes naturally to me.
I did a few latency tests, usually around 16000, highest ever recorded was 18000.
The BASE_PERIOD is set to 16666, MAX_VELOCITY set to 140. Does that look about right?
If you are getting latency peaks around 18000, then the fastest you should probably consider running the base-thread should probably be about 25000. Even then you might still get some real time warnings.
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So min. base period is my latency (18us) + min. required hold time (2us im my case), and a little extra wiggle room. Which is how you arrived at the base period of about 25000, right?
If i further examine the Stepper Tuning manual, it starts to get weird. Either i don't get this (likely) or my predecessor just messed things up. My drives datasheet is a little vague with only defining min. of all timing requirements at 2 us.
So Stepconf looks like this atm:
setp stepgen.0.steplen 1
setp stepgen.0.stepspace 0
setp stepgen.0.dirhold 7630
setp stepgen.0.dirsetup 7630
But the results of the Step timing Calculator suggests something completely different.
I know my drive needs at least one period before a direction change, so dirhold should be 18us latency + 2us min from the dive = at least 20000 ns?! No? And then there is stepspace (which i don't fully understand yet), but having it at 0 seems suspicions.
Id love your comment and advice on this. I hope it makes sense to you, and sonn will to me. Heads up!
Cheers,
Raph.
EDIT: One more thing that i cant seem to find out on my own: which parameter sets the signal output at either rising or falling edge? My drives like the rising variant, and i'd like to make sure LinuxCNC does exactly that. But where to check?
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- tommylight
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If i remember correctly:Raph wrote: setp stepgen.0.steplen 1
setp stepgen.0.stepspace 0
setp stepgen.0.dirhold 7630
setp stepgen.0.dirsetup 7630
Those are not timing settings, those are intervals of base period used for software stepping/parallel port, usually in hal there is an entry that resets the parallel port pins at a set interval,
The timings are usually in the ini file, or if they are not present, the above mentioned reset time will set the timings.
Eg.
loadrt hal_parport cfg="0x378 out"
setp parport.0.reset-time 5000
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But make sure that you can see evidence of a reset function being loaded in the HAL.
dihold and dirsetup are rarely, if ever, critical and there is very little penalty for them being too long as the motors are always moving at zero steps per second when a reversal happens.
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