Mesa 5i20 Smart Serial supporting Firmware

Do you have Webpack (9.2) installed?

I just added the 9.2i project file for a 5i20 to the 5I20.zip file:

www,mesanet.com/software/parallel/5i20.zip

In the zipfile find configs/hostmot2/source/hostmot2.zip

If you unzip the hostmot2.zip file into a new directory and then point
webpack to the hostmot2 project in that directory (file/open project) you
should be at least on the right path...

I've downloaded webPack_sfd_92i.zip
unziped the archive to home directory
in terminal
cd WebPACK_SFD_92i
./setup
got this
/home/d/WebPACK_SFD_92i/bin/lin/setup: error while loading shared libraries: libstdc++.so.5: cannot open shared object file: No such file or directory

installed libstdc++ 6-4.1 and shared library

still not able to run setup

What is missing?

finally I got xilinx 9.2i running. Windows-based.
I've opened your project having no idea how to make firmware.

please tell me where The magic button is

I need firmware to connect 5i20+7i33 (first port) 7i44 (any port) + 2x7i70 +2x7i71

I think it is SVSS8_8_72 ...

If you downloaded the recent 5i20.zip file it has SVSS4_8 selected (the pin file is selected in the top level file)

If you have Top9030Hostmot2 selected in the source pane (and its the top level module)
you should be able to just click on implement design --> generate programming file
(the generated bit file will be Top9030HostMot2.bit)

Reading design: Top9030HostMot2.prj

=========================================================================
* HDL Compilation *
=========================================================================
Compiling vhdl file "D:/hostmot2/log2.vhd" in Library work.
Package <log2> compiled.
Package body <log2> compiled.
Compiling vhdl file "D:/hostmot2/dpram.vhd" in Library work.
Entity <dpram> compiled.
Entity <dpram> (Architecture <syn>) compiled.
Compiling vhdl file "D:/hostmot2/IDROMConst.vhd" in Library work.
Package <IDROMConst> compiled.
Compiling vhdl file "D:/hostmot2/decodedstrobe.vhd" in Library work.
Package <decodedstrobe> compiled.
Package body <decodedstrobe> compiled.
Compiling vhdl file "D:/hostmot2/oneofndecode.vhd" in Library work.
Package <oneofndecode> compiled.
Package body <oneofndecode> compiled.
Compiling vhdl file "D:/hostmot2/d8o8sqw.vhd" in Library work.
Entity <DumbAss8sqw> compiled.
Entity <DumbAss8sqw> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/twidrom.vhd" in Library work.
Entity <twidrom> compiled.
Entity <twidrom> (Architecture <syn>) compiled.
Compiling vhdl file "D:/hostmot2/sslbprom.vhd" in Library work.
Entity <sslbp> compiled.
Entity <sslbp> (Architecture <syn>) compiled.
Compiling vhdl file "D:/hostmot2/sslbpram.vhd" in Library work.
Entity <sslbpram> compiled.
Entity <sslbpram> (Architecture <syn>) compiled.
Compiling vhdl file "D:/hostmot2/uartr8.vhd" in Library work.
Entity <uartr8> compiled.
Entity <uartr8> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/uartx8.vhd" in Library work.
Entity <uartx8> compiled.
Entity <uartx8> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/b32qcondmac2w.vhd" in Library work.
Entity <Big32v2> compiled.
Entity <Big32v2> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/resroms.vhd" in Library work.
Entity <resroms> compiled.
Entity <resroms> (Architecture <syn>) compiled.
Compiling vhdl file "D:/hostmot2/resrom.vhd" in Library work.
Entity <resrom> compiled.
Entity <resrom> (Architecture <syn>) compiled.
Compiling vhdl file "D:/hostmot2/sine16.vhd" in Library work.
Entity <sine16> compiled.
Entity <sine16> (Architecture <syn>) compiled.
Compiling vhdl file "D:/hostmot2/OutputInteg.vhd" in Library work.
Entity <OutputInteg> compiled.
Entity <OutputInteg> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/resolverdaq2.vhd" in Library work.
Entity <resolverdaq2> compiled.
Entity <resolverdaq2> (Architecture <behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/syncwavegen.vhd" in Library work.
Entity <syncwavegen> compiled.
Entity <syncwavegen> (Architecture <behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/waveram.vhd" in Library work.
Entity <waveram> compiled.
Entity <waveram> (Architecture <syn>) compiled.
Compiling vhdl file "D:/hostmot2/NumberOfModules.vhd" in Library work.
Package <NumberOfModules> compiled.
Package body <NumberOfModules> compiled.
Compiling vhdl file "D:/hostmot2/MaxPinsPerModule.vhd" in Library work.
Package <MaxPinsPerModule> compiled.
Package body <MaxPinsPerModule> compiled.
Compiling vhdl file "D:/hostmot2/MaxInputPinsPerModule.vhd" in Library work.
Package <MaxInputPinsPerModule> compiled.
Package body <MaxInputPinsPerModule> compiled.
Compiling vhdl file "D:/hostmot2/MaxOutputPinsPerModule.vhd" in Library work.
Package <MaxOutputPinsPerModule> compiled.
Package body <MaxOutputPinsPerModule> compiled.
Compiling vhdl file "D:/hostmot2/MaxIOPinsPerModule.vhd" in Library work.
Package <MaxIOPinsPerModule> compiled.
Package body <MaxIOPinsPerModule> compiled.
Compiling vhdl file "D:/hostmot2/CountPinsInRange.vhd" in Library work.
Package <CountPinsInRange> compiled.
Package body <CountPinsInRange> compiled.
Compiling vhdl file "D:/hostmot2/PinExists.vhd" in Library work.
Package <PinExists> compiled.
Package body <PinExists> compiled.
Compiling vhdl file "D:/hostmot2/ModuleExists.vhd" in Library work.
Package <ModuleExists> compiled.
Package body <ModuleExists> compiled.
Compiling vhdl file "D:/hostmot2/hostmotid.vhd" in Library work.
Entity <hostmotid> compiled.
Entity <hostmotid> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/wordpr.vhd" in Library work.
Entity <wordpr> compiled.
Entity <wordpr> (Architecture <behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/wordrb.vhd" in Library work.
Entity <wordrb> compiled.
Entity <wordrb> (Architecture <behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/watchdog.vhd" in Library work.
Entity <watchdog> compiled.
Entity <watchdog> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/drqlogic.vhd" in Library work.
Entity <dmdrqlogic> compiled.
Entity <dmdrqlogic> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/irqlogic.vhd" in Library work.
Entity <irqlogic> compiled.
Entity <irqlogic> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/ubrategen.vhd" in Library work.
Entity <rategen> compiled.
Entity <rategen> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/kubstepgenz.vhd" in Library work.
Entity <stepgen> compiled.
Entity <stepgen> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/kubstepgenzi.vhd" in Library work.
Entity <stepgeni> compiled.
Entity <stepgeni> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/qcountersf.vhd" in Library work.
Entity <qcounter> compiled.
Entity <qcounter> (Architecture <behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/qcountersfp.vhd" in Library work.
Entity <qcounterp> compiled.
Entity <qcounterp> (Architecture <behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/timestamp.vhd" in Library work.
Entity <timestamp> compiled.
Entity <timestamp> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/qcounterate.vhd" in Library work.
Entity <qcounterate> compiled.
Entity <qcounterate> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/pwmrefh.vhd" in Library work.
Entity <pwmrefh> compiled.
Entity <pwmrefh> (Architecture <behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/pwmpdmgenh.vhd" in Library work.
Entity <pwmpdmgenh> compiled.
Entity <pwmpdmgenh> (Architecture <behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/boutreg.vhd" in Library work.
Entity <boutreg> compiled.
Entity <boutreg> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/threephasepwm.vhd" in Library work.
Entity <threephasepwm> compiled.
Entity <threephasepwm> (Architecture <behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/simplespix.vhd" in Library work.
Entity <simplespi> compiled.
Entity <simplespi> (Architecture <behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/bufferedspi.vhd" in Library work.
Entity <bufferedspi> compiled.
Entity <bufferedspi> (Architecture <behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/simplessi.vhd" in Library work.
Entity <SimpleSSI> compiled.
Entity <SimpleSSI> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/biss.vhd" in Library work.
Entity <biss> compiled.
Entity <biss> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/daqfifo16.vhd" in Library work.
Entity <DAQFIFO16> compiled.
Entity <DAQFIFO16> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/uartr.vhd" in Library work.
Entity <uartr> compiled.
Entity <uartr> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/uartx.vhd" in Library work.
Entity <uartx> compiled.
Entity <uartx> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/binosc.vhd" in Library work.
Entity <binosc> compiled.
Entity <binosc> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/wavegen.vhd" in Library work.
Entity <wavegen> compiled.
Entity <wavegen> (Architecture <behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/resolver.vhd" in Library work.
Entity <resolver> compiled.
Entity <resolver> (Architecture <dataflow>) compiled.
Compiling vhdl file "D:/hostmot2/sserialw.vhd" in Library work.
Entity <sserialw> compiled.
Entity <sserialw> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/twiddle.vhd" in Library work.
Entity <twiddle> compiled.
Entity <twiddle> (Architecture <Behavioral>) compiled.
Compiling vhdl file "D:/hostmot2/idrom.vhd" in Library work.
Entity <IDROM> compiled.
Entity <IDROM> (Architecture <syn>) compiled.
Compiling vhdl file "D:/hostmot2/hostmot2.vhd" in Library work.
Entity <HostMot2> compiled.
Entity <HostMot2> (Architecture <dataflow>) compiled.
Compiling vhdl file "D:/hostmot2/Top9030HostMot2.vhd" in Library work.
ERROR:HDLParsers:163 - "D:/hostmot2/Top9030HostMot2.vhd" Line 79. Unexpected symbol read: @.
ERROR:HDLParsers:163 - "D:/hostmot2/Top9030HostMot2.vhd" Line 79. Unexpected symbol read: @.
ERROR:HDLParsers:3014 - "D:/hostmot2/Top9030HostMot2.vhd" Line 79. Library unit CARD is not available in library work.
-->

Total memory usage is 138840 kilobytes

Number of errors : 3 ( 0 filtered)
Number of warnings : 0 ( 0 filtered)
Number of infos : 0 ( 0 filtered)


Process "Synthesize" failed

You will need to edit the Top9030HostMot2.vhd file (double click on it in the source pane)
and change the lines that select the card and pinout file to the correct ones

that is, comment out the:
use work.@CARD@.all;
and uncomment the
--use work.i20card.all;

likewise in the pinout section comment out the:
use work.@PIN@.all;
and uncomment the desired pinout, most likely:
--use work.PIN_SVSS4_4_72.all;

Something new)

ERROR:HDLParsers:3011 - "D:/hostmot2/Top9030HostMot2.vhd" Line 315. End Identifier LADDrivers does not match declaration, WSLADDrivers.
ERROR:HDLParsers:3011 - "D:/hostmot2/Top9030HostMot2.vhd" Line 327. End Identifier LADDrivers does not match declaration, NoWSLADDrivers.

Yeah unfortunately the HostMot2 source is from the latest build tools (14.1) which wont build the Spartan2 stuff like 5I20 bitfiles, so theres some bit rot. You can try just patching the names (fix both end identifiers)

DONE!!! but with WARNINGS!

Is this firmware feasible?)))

WARNING:Xst:1994 - "D:/hostmot2/hostmot2.vhd" line 330: Null range in type of signal <DAQFIFOReq>.
WARNING:Xst:1994 - "D:/hostmot2/hostmot2.vhd" line 393: Null range in type of signal <DRQSources>.
WARNING:Xst:753 - "D:/hostmot2/Top9030HostMot2.vhd" line 258: Unconnected output port 'dreq' of component 'HostMot2'.
WARNING:Xst:753 - "D:/hostmot2/Top9030HostMot2.vhd" line 258: Unconnected output port 'demandmode' of component 'HostMot2'.
WARNING:Xst:1994 - "D:/hostmot2/Top9030HostMot2.vhd" line 133: Null range in type of signal <liobits>.
WARNING:Xst:1994 - "D:/hostmot2/hostmot2.vhd" line 133: Null range in type of signal <liobits>.
WARNING:Xst:1994 - "D:/hostmot2/hostmot2.vhd" line 330: Null range in type of signal <DAQFIFOReq>.
WARNING:Xst:1994 - "D:/hostmot2/hostmot2.vhd" line 393: Null range in type of signal <DRQSources>.
WARNING:Xst:819 - "D:/hostmot2/hostmot2.vhd" line 2023: The following signals are missing in the process sensitivity list:
WARNING:Xst:753 - "D:/hostmot2/sserialw.vhd" line 254: Unconnected output port 'carryflg' of component 'DumbAss8sqw'.
WARNING:Xst:753 - "D:/hostmot2/sserialw.vhd" line 281: Unconnected output port 'douta' of component 'sslbpram'.
WARNING:Xst:753 - "D:/hostmot2/sserialw.vhd" line 297: Unconnected output port 'douta' of component 'dpram'.
WARNING:Xst:753 - "D:/hostmot2/sserialw.vhd" line 312: Unconnected output port 'douta' of component 'dpram'.
WARNING:Xst:753 - "D:/hostmot2/sserialw.vhd" line 327: Unconnected output port 'douta' of component 'dpram'.
WARNING:Xst:753 - "D:/hostmot2/sserialw.vhd" line 342: Unconnected output port 'douta' of component 'dpram'.
WARNING:Xst:753 - "D:/hostmot2/sserialw.vhd" line 357: Unconnected output port 'douta' of component 'dpram'.
WARNING:Xst:753 - "D:/hostmot2/sserialw.vhd" line 372: Unconnected output port 'douta' of component 'dpram'.
WARNING:Xst:753 - "D:/hostmot2/sserialw.vhd" line 387: Unconnected output port 'douta' of component 'dpram'.
WARNING:Xst:753 - "D:/hostmot2/sserialw.vhd" line 402: Unconnected output port 'douta' of component 'dpram'.
WARNING:Xst:819 - "D:/hostmot2/d8o8sqw.vhd" line 274: The following signals are missing in the process sensitivity list:
WARNING:Xst:2211 - "D:/hostmot2/uartr8.vhd" line 150: Instantiating black box module <SRL16E>.
WARNING:Xst:2211 - "D:/hostmot2/uartr8.vhd" line 150: Instantiating black box module <SRL16E>.
WARNING:Xst:2211 - "D:/hostmot2/uartr8.vhd" line 150: Instantiating black box module <SRL16E>.
WARNING:Xst:2211 - "D:/hostmot2/uartr8.vhd" line 150: Instantiating black box module <SRL16E>.
WARNING:Xst:2211 - "D:/hostmot2/uartr8.vhd" line 150: Instantiating black box module <SRL16E>.
WARNING:Xst:2211 - "D:/hostmot2/uartr8.vhd" line 150: Instantiating black box module <SRL16E>.
WARNING:Xst:2211 - "D:/hostmot2/uartr8.vhd" line 150: Instantiating black box module <SRL16E>.
WARNING:Xst:2211 - "D:/hostmot2/uartr8.vhd" line 150: Instantiating black box module <SRL16E>.
WARNING:Xst:2211 - "D:/hostmot2/uartx8.vhd" line 152: Instantiating black box module <SRL16E>.
WARNING:Xst:2211 - "D:/hostmot2/uartx8.vhd" line 152: Instantiating black box module <SRL16E>.
WARNING:Xst:2211 - "D:/hostmot2/uartx8.vhd" line 152: Instantiating black box module <SRL16E>.
WARNING:Xst:2211 - "D:/hostmot2/uartx8.vhd" line 152: Instantiating black box module <SRL16E>.
WARNING:Xst:2211 - "D:/hostmot2/uartx8.vhd" line 152: Instantiating black box module <SRL16E>.
WARNING:Xst:2211 - "D:/hostmot2/uartx8.vhd" line 152: Instantiating black box module <SRL16E>.
WARNING:Xst:2211 - "D:/hostmot2/uartx8.vhd" line 152: Instantiating black box module <SRL16E>.
WARNING:Xst:2211 - "D:/hostmot2/uartx8.vhd" line 152: Instantiating black box module <SRL16E>.
WARNING:Xst:2096 - "D:/hostmot2/boutreg.vhd" line 107: Use of null array slice on signal <obus> is not supported.
WARNING:Xst:647 - Input <ibus<31:24>> is never used.
WARNING:Xst:1780 - Signal <tddr> is never used or assigned.
WARNING:Xst:2734 - Property "use_dsp48" is not applicable for this technology.
WARNING:Xst:647 - Input <ibus<31:16>> is never used.
WARNING:Xst:2734 - Property "use_dsp48" is not applicable for this technology.
WARNING:Xst:647 - Input <ibus<31:16>> is never used.
WARNING:Xst:647 - Input <ibus<13:12>> is never used.
WARNING:Xst:647 - Input <ibus<2:0>> is never used.
WARNING:Xst:647 - Input <ibus<31:1>> is never used.
WARNING:Xst:1780 - Signal <mwa> is never used or assigned.
WARNING:Xst:2734 - Property "use_dsp48" is not applicable for this technology.
WARNING:Xst:2734 - Property "use_dsp48" is not applicable for this technology.
WARNING:Xst:2734 - Property "use_dsp48" is not applicable for this technology.
WARNING:Xst:2734 - Property "use_dsp48" is not applicable for this technology.
WARNING:Xst:1780 - Signal <lfifohasdata> is never used or assigned.
WARNING:Xst:646 - Signal <SReg<0>> is assigned but never used.
WARNING:Xst:1780 - Signal <readtxbitratelsel> is never used or assigned.
WARNING:Xst:1780 - Signal <doorbellreg> is never used or assigned.
WARNING:Xst:1780 - Signal <readtxbitratemsel> is never used or assigned.
WARNING:Xst:646 - Signal <baseclockslv> is assigned but never used.
WARNING:Xst:1780 - Signal <readtxbitratehsel> is never used or assigned.
WARNING:Xst:1780 - Signal <readdoorbell> is never used or assigned.
WARNING:Xst:646 - Signal <rxfifohasdata> is assigned but never used.
WARNING:Xst:646 - Signal <txfifoempty> is assigned but never used.
WARNING:Xst:1780 - Signal <cleardoorbell> is never used or assigned.
WARNING:Xst:2563 - Inout <liobits<-1>> is never assigned. Tied to value Z.
WARNING:Xst:2563 - Inout <liobits<0>> is never assigned. Tied to value Z.
WARNING:Xst:647 - Input <clkhigh> is never used.
WARNING:Xst:646 - Signal <StepGenTableMaxSel> is assigned but never used.
WARNING:Xst:646 - Signal <SSSIControlSel> is assigned but never used.
WARNING:Xst:1780 - Signal <TPRefCountBus> is never used or assigned.
WARNING:Xst:646 - Signal <LoadDMDMAMode> is assigned but never used.
WARNING:Xst:646 - Signal <ReadMuxedTS> is assigned but never used.
WARNING:Xst:646 - Signal <WaveGenTableDataSel> is assigned but never used.
WARNING:Xst:646 - Signal <UARTTModeRegSel> is assigned but never used.
WARNING:Xst:653 - Signal <RefCountBus<12:5>> is used but never assigned. Tied to value 00000000.
WARNING:Xst:1780 - Signal <RefCountBus<4:0>> is never used or assigned.
WARNING:Xst:646 - Signal <TPPWMEnaSel> is assigned but never used.
WARNING:Xst:646 - Signal <ResModVelRAMSel> is assigned but never used.
WARNING:Xst:646 - Signal <StepGenModeSel> is assigned but never used.
WARNING:Xst:1780 - Signal <PDMRate> is never used or assigned.
WARNING:Xst:646 - Signal <BSPIFIFOCountSel> is assigned but never used.
WARNING:Xst:646 - Signal <ReadMuxedTSDiv> is assigned but never used.
WARNING:Xst:646 - Signal <SSSIDataSel> is assigned but never used.
WARNING:Xst:646 - Signal <TwiddlerDataSel> is assigned but never used.
WARNING:Xst:646 - Signal <LoadPWMRate> is assigned but never used.
WARNING:Xst:646 - Signal <StepGenRateSel> is assigned but never used.
WARNING:Xst:646 - Signal <ResModCommandSel> is assigned but never used.
WARNING:Xst:646 - Signal <WaveGenRateSel> is assigned but never used.
WARNING:Xst:646 - Signal <TPPWMDZSel> is assigned but never used.
WARNING:Xst:646 - Signal <UARTRModeRegSel> is assigned but never used.
WARNING:Xst:646 - Signal <TwiddlerRAMSel> is assigned but never used.
WARNING:Xst:646 - Signal <WaveGenLengthSel> is assigned but never used.
WARNING:Xst:1780 - Signal <GlobalTStartBISS> is never used or assigned.
WARNING:Xst:646 - Signal <DAQFIFOCountSel> is assigned but never used.
WARNING:Xst:646 - Signal <BSPIDataSel> is assigned but never used.
WARNING:Xst:646 - Signal <BISSDataSel> is assigned but never used.
WARNING:Xst:1780 - Signal <NumberOfPWMS> is never used or assigned.
WARNING:Xst:646 - Signal <UARTTFIFOCountSel> is assigned but never used.
WARNING:Xst:646 - Signal <DAQFIFODataSel> is assigned but never used.
WARNING:Xst:646 - Signal <ResModDataSel> is assigned but never used.
WARNING:Xst:646 - Signal <StepGenAccumSel> is assigned but never used.
WARNING:Xst:1780 - Signal <GlobalTStartSSSI> is never used or assigned.
WARNING:Xst:646 - Signal <StepGenDSUTimeSel> is assigned but never used.
WARNING:Xst:646 - Signal <TwiddlerCommandSel> is assigned but never used.
WARNING:Xst:646 - Signal <TPPWMValSel> is assigned but never used.
WARNING:Xst:1780 - Signal <NumberOfTPPWMS> is never used or assigned.
WARNING:Xst:653 - Signal <IndexMask> is used but never assigned. Tied to value 0000.
WARNING:Xst:646 - Signal <PWMCRSel> is assigned but never used.
WARNING:Xst:1780 - Signal <MuxedTimeStampBus> is never used or assigned.
WARNING:Xst:646 - Signal <ReadPWMEnas> is assigned but never used.
WARNING:Xst:646 - Signal <ResModStatusSel> is assigned but never used.
WARNING:Xst:1780 - Signal <MuxedQCountFilterRate> is never used or assigned.
WARNING:Xst:646 - Signal <ReadStepGenBasicRate> is assigned but never used.
WARNING:Xst:646 - Signal <UARTTDataSel> is assigned but never used.
WARNING:Xst:646 - Signal <DBSPIDescriptorSel> is assigned but never used.
WARNING:Xst:646 - Signal <WaveGenTablePtrSel> is assigned but never used.
WARNING:Xst:646 - Signal <SSerialTestBits<0>> is assigned but never used.
WARNING:Xst:646 - Signal <ReadDMDMAMode> is assigned but never used.
WARNING:Xst:646 - Signal <MuxedQCounterCCRSel> is assigned but never used.
WARNING:Xst:646 - Signal <LoadStepGenBasicRate> is assigned but never used.
WARNING:Xst:646 - Signal <LoadPDMRate> is assigned but never used.
WARNING:Xst:646 - Signal <UARTRFIFOCountSel> is assigned but never used.
WARNING:Xst:646 - Signal <ResModPosRAMSel> is assigned but never used.
WARNING:Xst:646 - Signal <SPIDataSel> is assigned but never used.
WARNING:Xst:646 - Signal <WaveGenPDMRateSel> is assigned but never used.
WARNING:Xst:646 - Signal <StepGenPulseITimeSel> is assigned but never used.
WARNING:Xst:1780 - Signal <ROMAdd> is never used or assigned.
WARNING:Xst:653 - Signal <AltData<71:24>> is used but never assigned. Tied to value 000000000000000000000000000000000000000000000000.
WARNING:Xst:653 - Signal <AltData<15:0>> is used but never assigned. Tied to value 0000000000000000.
WARNING:Xst:646 - Signal <LoadPWMEnas> is assigned but never used.
WARNING:Xst:646 - Signal <DBSPIFIFOCountSel> is assigned but never used.
WARNING:Xst:1780 - Signal <MuxedProbe> is never used or assigned.
WARNING:Xst:646 - Signal <LoadBinOscEnaSel> is assigned but never used.
WARNING:Xst:646 - Signal <GlobalPStartBISS> is assigned but never used.
WARNING:Xst:646 - Signal <UARTTBitrateSel> is assigned but never used.
WARNING:Xst:646 - Signal <BISSControlSel> is assigned but never used.
WARNING:Xst:1780 - Signal <MuxedQCtrSel> is never used or assigned.
WARNING:Xst:646 - Signal <WDLatchedBite> is assigned but never used.
WARNING:Xst:646 - Signal <MuxedQCounterSel> is assigned but never used.
WARNING:Xst:646 - Signal <LoadMuxedQCountRate> is assigned but never used.
WARNING:Xst:646 - Signal <UARTRDataSel> is assigned but never used.
WARNING:Xst:646 - Signal <GlobalPStartSSSI> is assigned but never used.
WARNING:Xst:646 - Signal <StepGenTableSel> is assigned but never used.
WARNING:Xst:646 - Signal <UARTRBitrateSel> is assigned but never used.
WARNING:Xst:646 - Signal <DAQFIFOModeSel> is assigned but never used.
WARNING:Xst:1780 - Signal <StepGenBasicRate> is never used or assigned.
WARNING:Xst:646 - Signal <BSPIDescriptorSel> is assigned but never used.
WARNING:Xst:646 - Signal <PWMValSel> is assigned but never used.
WARNING:Xst:646 - Signal <SPIBitrateSel> is assigned but never used.
WARNING:Xst:1780 - Signal <PreMuxedQctrSel> is never used or assigned.
WARNING:Xst:646 - Signal <StepGenDHLDTimeSel> is assigned but never used.
WARNING:Xst:646 - Signal <LoadTPPWMRate> is assigned but never used.
WARNING:Xst:646 - Signal <SPIBitCountSel> is assigned but never used.
WARNING:Xst:646 - Signal <StepGenPulseATimeSel> is assigned but never used.
WARNING:Xst:646 - Signal <LoadMuxedTSDiv> is assigned but never used.
WARNING:Xst:646 - Signal <DBSPIDataSel> is assigned but never used.
WARNING:Xst:1780 - Signal <Probe> is never used or assigned.
WARNING:Xst:647 - Input <RESET> is never used.
WARNING:Xst:647 - Input <LBE> is never used.
WARNING:Xst:1780 - Signal <EnableHS> is never used or assigned.
WARNING:Xst:1780 - Signal <BurstCount> is never used or assigned.
WARNING:Xst:646 - Signal <Clk0> is assigned but never used.
WARNING:Xst:2734 - Property "use_dsp48" is not applicable for this technology.
WARNING:Xst:2677 - Node <SReg_0> of sequential type is unconnected in block <uartr8>.
WARNING:Xst:1710 - FF/Latch <rated_0> (without init value) has a constant value of 0 in block <irqlogic>.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <rated_1> (without init value) has a constant value of 0 in block <irqlogic>.
WARNING:Xst:2677 - Node <irqdiv_0> of sequential type is unconnected in block <irqlogic>.
WARNING:Xst:2677 - Node <irqdiv_1> of sequential type is unconnected in block <irqlogic>.
WARNING:Xst:2677 - Node <irqdiv_2> of sequential type is unconnected in block <irqlogic>.
WARNING:Xst:2677 - Node <irqdiv_3> of sequential type is unconnected in block <irqlogic>.
WARNING:Xst:2677 - Node <irqdiv_4> of sequential type is unconnected in block <irqlogic>.
WARNING:Xst:2677 - Node <irqdiv_5> of sequential type is unconnected in block <irqlogic>.
WARNING:Xst:2677 - Node <irqdiv_6> of sequential type is unconnected in block <irqlogic>.
WARNING:Xst:2677 - Node <irqdiv_7> of sequential type is unconnected in block <irqlogic>.
WARNING:Xst:2677 - Node <irqdiv_8> of sequential type is unconnected in block <irqlogic>.
WARNING:Xst:2677 - Node <irqdiv_9> of sequential type is unconnected in block <irqlogic>.
WARNING:Xst:2677 - Node <irqdiv_10> of sequential type is unconnected in block <irqlogic>.
WARNING:Xst:2677 - Node <irqdiv_11> of sequential type is unconnected in block <irqlogic>.
WARNING:Xst:2677 - Node <irqdiv_12> of sequential type is unconnected in block <irqlogic>.
WARNING:Xst:2677 - Node <irqdiv_13> of sequential type is unconnected in block <irqlogic>.
WARNING:Xst:2677 - Node <irqdiv_14> of sequential type is unconnected in block <irqlogic>.
WARNING:Xst:2677 - Node <irqdiv_15> of sequential type is unconnected in block <irqlogic>.
WARNING:ProjectMgmt - "D:/hostmot2/Top9030HostMot2.ngc" line 0 duplicate design unit: 'Module|Top9030HostMot2'
WARNING:ProjectMgmt - "D:/hostmot2/Top9030HostMot2_map.ncd" line 0 duplicate design unit: 'Module|Top9030HostMot2'
WARNING:Timing:3223 - Timing constraint TS_P2P = MAXDELAY FROM TIMEGRP "PADS" TO TIMEGRP "PADS" 50 ns; ignored during
WARNING:Par:288 - The signal LBE<0>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal LBE<1>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal LBE<2>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:288 - The signal LBE<3>_IBUF has no load. PAR will not attempt to route this signal.
WARNING:Par:283 - There are 4 loadless signals in this design. This design will cause Bitgen to issue DRC warnings.
WARNING:Timing:3223 - Timing constraint TS_P2P = MAXDELAY FROM TIMEGRP "PADS" TO
WARNING:PhysDesignRules:367 - The signal <LBE<0>_IBUF> is incomplete. The signal
WARNING:PhysDesignRules:367 - The signal <LBE<1>_IBUF> is incomplete. The signal
WARNING:PhysDesignRules:367 - The signal <LBE<2>_IBUF> is incomplete. The signal
WARNING:PhysDesignRules:367 - The signal <LBE<3>_IBUF> is incomplete. The signal

Its probably OK
Important things to check are that the ucf file (5i20.ucf) is associated with Top9030HostMot2.vhd and that timing was met

these warnings _are_ rather strange: you might try a project--> cleanup files

WARNING:ProjectMgmt - "D:/hostmot2/Top9030HostMot2.ngc" line 0 duplicate design unit: 'Module|Top9030HostMot2'
WARNING:ProjectMgmt - "D:/hostmot2/Top9030HostMot2_map.ncd" line 0 duplicate design unit: 'Module|Top9030HostMot2'