ColorCNC Colorlight 5A-75E/5A-75B as FPGA controller board

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4 years 7 months ago #236254 by tommylight


A wizard is never late, nor is he early. He arrives precisely when he means to.
Gandalf from Lord of the rings ?

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4 years 7 months ago #236291 by
Yeah had a foreman say that to me when I was just on time for a job, thought it was kinda funny.

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4 years 7 months ago #236312 by tuxcnc

What is the vendor and product id of your programmer ?

 
Code:
[58083.900292] usb 8-1: new full-speed USB device number 2 using xhci_hcd [58084.099369] usb 8-1: New USB device found, idVendor=09fb, idProduct=6001, bcdDevice= 4.00 [58084.099386] usb 8-1: New USB device strings: Mfr=1, Product=2, SerialNumber=3 [58084.099394] usb 8-1: Product: USB-Blaster [58084.099399] usb 8-1: Manufacturer: Altera [58084.099405] usb 8-1: SerialNumber: 8a64SEZW

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4 years 7 months ago #236318 by
Yep that should work with openfpgaloader
Code:
openfpgaloader -c usb-blaster yourbitfile.bit

There are other switches you can use. Best to read the docs github.com/trabucayre/openFPGALoader

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4 years 7 months ago #236376 by TOLP2
Just uploaded a new IceStudio file for a stepgenerator; this file can be easily converted to a Verilog file and subsequently added to the firmware.

Why not using Pluto-Step? I didn't like the fact it does not take acceleration into account on the FPGA. The standard LinuxCNC stepgen does take acceleration into account. So the code of make_pulses is converted to something a FPGA should easilty run...
 
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4 years 7 months ago - 4 years 7 months ago #236437 by cncwhacko
You are doing a great job making this more modular and extensible! Super cool to see it getting pieced together--looking forward to the step generation code. At that point it would have all of my immediate needs covered. I also ordered some SN74CBT3245APWR to replace on the board for input pins, ALittleOffTheRails convinced me ;-). It would be silly not to make use of some of these pins for inputs as well down the line.

I did some further testing with the older version of the gateware and im still suspect of the buffer depth (1060) being too deep as most the liteeth docs show max of 255, ref; github.com/enjoy-digital/litex/blob/mast...ote/etherbone.py#L92 . I was able to do a test to make sure that the board in general works just fine running something like github.com/enjoy-digital/liteeth/blob/ma...ch/test_etherbone.py and it will happily read/respond to the registers in this case.
Last edit: 4 years 7 months ago by cncwhacko.
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