Creating custom configs for Mesa 7i80HDT

I built Mesaflash 3.5.2. It now reads the HMID information. However, to use the --write command I have to use
--device=ETHER

if I use
--device=7I80HDT
it says the 7i80HDT is not supported.

Why is this? Seems odd to me.

Sorry broke name checking with recent more strict checking
Should be fixed now (3.5.3)

I did a bit more checking and alothough the firware you provided for the i80hdt has the same functionality as the i93, the connectors are in a different order

in the i93 iO-0 to IO-23 are on the the connector closest to the edge of the PCB (P2) whereas on the i80 IO-0 to IO-23 are on P1 the left most connector (P3 closest to the edge of the PCB)

The connector order is important on my setup as I am using 50 conductor ribon cables to connect to my custom board as below.
 

Any chance there is a bit file that would swap P1 and P3? 
 

 

Thanks for this file. Although it will work the way it is, it would be slightly better if you could move the StepGens now on P1 to P2. That way the IO pins would be the same numbers as my original implementation and I would not have to cover up the middle P2 connector with the ribbon cable that would be plugged into P1.

I tried opening your source project in Efinity software but when I run the synthesis step, the program just crashes part way through the parsing project. What version of Efinity are you using to create this bit files? I have 2023.1

I normally use the version I started with (2021.2) since placement seed
values change from version to version. I have used 2023.1.  You also may
want to re-fetch the current sources, as there has been some roto-tilling  to
get the latest updates (PktUART, periodm, oneshotm,sserialb) included on
all builds. In addition slow clock versions have been added to 7i96s,7i95t,
7i80hdt for denser configurations that are hard to meet timing.

What error do you get?

I do know that you need more than 4G of RAM or
Efinity will run out of memory on some compiles.


Also you could just send me or post your desired
pinout file and I can compile it.

Are the current sources part of the LinuxCNC distribushion or is there a different git repository for these?

I am running Efinity in a windows environment. My machine has 32GB of ram and its only running at 40% used when I try and sythesize. This is the end of the log showing the error.

[EFX-0000 INFO] ... Hierarchical pre-synthesis "uartx8" begin
[EFX-0000 INFO] ... Hierarchical pre-synthesis "uartx8" end (Real time : 0s)
[EFX-0000 INFO] ... Hierarchical pre-synthesis "sserialwa(ports=2,interfaceregs=2,baseclock=100000000,needcrc8=true)" begin
Error in running process. Process crash.
Thu November 9 23 13:14:09 - G:/Efinity/2023.1/bin/efx_map finished. Exit code = -1073741819 Exit status : Crash
Running synthesis flow fail. See exit code and exit status.
Thu November 9 23 13:14:09 - Running synthesis flow done. Duration = 0m 7.135s

No idea what's wrong there, but I've never run the tools under Windows.
Just tried Efinity 2023.1 (Linux)  and see no issues (other than you may need
to use the  7i80hdt25 source to meet timing without trying 50 different seeds)