RV901T as MESA 7i90: Custom bitstream generation with PWMTag leads to error

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2 years 6 months ago #297549 by PCW
There are at least 3 clock domains: COM_SPI_CLK, CLOCKLOW,CLOCKHIGH
Any needed synchronization is done in the firmware.

Just as a test, you might would try moving the COM_SPI GCLK pin
to another GCLK. To me this seems  like it may cause a conflict

Worst case since you cannot move the 25 MHz clock, you could try
eliminating the fclk DCM (and run everything at 100 MHz)
 
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