Mesa 7i96s pktUAT on P1

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26 Sep 2024 09:50 #310818 by nartburg
Dear Folks,

as explored in the "mesa-7i96s with 5 encoders and modbus" topic it seems that some part of my board got to excited and it decided to emitt magical smoke and quit.

As I was not able to find any schematics of the 7i96s all of this is shrouded in the mist of lacking knowledge and I hope somebody will be able to shed some light on it

I was able to move the faulted encoder input plus additional 4 to P1 and as I was planning to use sserial for some other stuff I tried to move pktUART to P1 as well the synthesis and all that shenagans went well and I was able to mesaflash.

(output of mesaflash --read):

IO Connections for P1 -> 7I96_2
Pin#                  I/O   Pri. func    Sec. func        Chan     Sec. Pin func   Sec. Pin Dir

P1-01/DB25-01          34   IOPort       QCount           1        Quad-A          (In)
P1-02/DB25-14          35   IOPort       QCount           1        Quad-B          (In)
P1-03/DB25-02          36   IOPort       QCount           2        Quad-A          (In)
P1-04/DB25-15          37   IOPort       QCount           2        Quad-B          (In)
P1-05/DB25-03          38   IOPort       QCount           3        Quad-A          (In)
P1-06/DB25-16          39   IOPort       QCount           3        Quad-B          (In)
P1-07/DB25-04          40   IOPort       QCount           4        Quad-A          (In)
P1-08/DB25-17          41   IOPort       QCount           4        Quad-B          (In)
P1-09/DB25-05          42   IOPort       QCount           5        Quad-A          (In)
P1-11/DB25-06          43   IOPort       QCount           5        Quad-B          (In)
P1-13/DB25-07          44   IOPort       PktUARTTX        0        TXData          (Out)
P1-15/DB25-08          45   IOPort       PktUARTRX        0        RXData          (In)
P1-17/DB25-09          46   IOPort       None           
P1-19/DB25-10          47   IOPort       None           
P1-21/DB25-11          48   IOPort       None           
P1-23/DB25-12          49   IOPort       None           
P1-25/DB25-13          50   IOPort       None       

The relocationing of the encoders to P1 works (I had to put in some optical isolated RS485 to ttl convertes to get the differential signal to A/B) but pktUART didn't.

PCW and I chased the rabbit down the -- get pktUART working with the 7i96sd_pktv2.bin from mesa -- hole only to find that this part of the board seems to be fried.

So ist it possible to allocate pktUART to P1 and if how?

 

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26 Sep 2024 14:06 #310832 by PCW
Replied by PCW on topic Mesa 7i96s pktUAT on P1
That should work (assuming you RS-485 interface has automatic direction control
since there no TXEN pin)

Are you sure the on card RS-485 interface is damaged?
That seem unlikely unless it was exposed to voltages
greater than +- 14V

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26 Sep 2024 16:20 #310840 by nartburg
Replied by nartburg on topic Mesa 7i96s pktUAT on P1
of course I'm not sure as the only diagnostic I have is what we tried yesterday.

The on card encoder was fine on the desk but once I got it into the cabinet it stopped working -- maybe it got an transient and as the on card RS-485 is right beside it -- maybe it got hit as well but with out any schematics it's hard to tell and so I tried to move every thing ( 5 encoders and the modbus ) to P1

and as mentioned before the encoders work fine (after converting the diff signal) but pktUART is silent.

So is it possible and how?

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26 Sep 2024 17:10 - 27 Sep 2024 17:43 #310842 by PCW
Replied by PCW on topic Mesa 7i96s pktUAT on P1
Maybe incorrect test methodology of failed components, it's hard to tell.

You can verify that al P1 pins are OK by

1. Power cycle 7I96S, all P1 I/O pins should read high.

2. Then set all GPIO pins on P1 low by:

mesaflash --device 7i96s --addr [ipaddr]  --wpo 0x1008=0
mesaflash --device 7i96s --addr [ipaddr]  --wpo 0x1108=0xFFFFF

All P1 GPIO pins should now read low.
 
Last edit: 27 Sep 2024 17:43 by PCW.

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26 Sep 2024 17:45 #310846 by nartburg
Replied by nartburg on topic Mesa 7i96s pktUAT on P1
will try tomorrow thx

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27 Sep 2024 17:21 - 27 Sep 2024 17:53 #310909 by nartburg
Replied by nartburg on topic Mesa 7i96s pktUAT on P1
post powercycle:

0 / 5     this is the side where GND and VCC are attached to the board
0 / 5    
0 / 5    
0 / 5
0 / 5
0 / 5
0 / 5
0 / 5
0 / 5
5 / 5
5 / 5
5 / 5
5 / 5  this is the side where the  ETH PHY is mounted

all pins low except top-right after the commands
Last edit: 27 Sep 2024 17:53 by nartburg. Reason: clarify the diagram / the first time had a seg fault from some other experiments and forgot to clear that before sending this mesaflash

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27 Sep 2024 17:43 #310911 by PCW
Replied by PCW on topic Mesa 7i96s pktUAT on P1
sorry, its

2. Then set all GPIO pins on P1 low by:

mesaflash --device 7i96s --addr [ipaddr]  --wpo 0x1008=0
mesaflash --device 7i96s --addr [ipaddr]  --wpo 0x1108=0xFFFFF

 

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27 Sep 2024 18:03 #310912 by nartburg
Replied by nartburg on topic Mesa 7i96s pktUAT on P1
OK! with adress 0x1008 and 0x1108 all gpio are low

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27 Sep 2024 18:51 - 27 Sep 2024 19:25 #310915 by PCW
Replied by PCW on topic Mesa 7i96s pktUAT on P1
OK if all I/O are high on power up and low after the mesaflash commands,
that means All P1 I/O bits are functional. so it's not likely a hardware issue.

Maybe the next step is to verify that you can do a loopback through the P2
RS-485 port.

 

File Attachment:

File Name: echo_2024-09-27.txt
File Size:1 KB


 (you will need to "chmod +x echo.txt" to run it)

Will check if the 7I96S RS-485 hardware is OK

It requires a simple 6 pin loopback plug with TX+ connected to RX+ and TX- connected to RX-

When the plug is not inserted,  the expected result is
0000EFFF
00002FFF
00006FFF
 When the loopback plug is inserted (TB2 pins pin 15..20), the expected result is
0000EFFF
00000FFF
00006FFF




 
Attachments:
Last edit: 27 Sep 2024 19:25 by PCW.

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27 Sep 2024 21:07 #310918 by nartburg
Replied by nartburg on topic Mesa 7i96s pktUAT on P1
Why 6 pin?
and is it TB2 pin 15,16,17,18,19,20 or pin 15 and pin 20 ?

please elaborate a little bit further

 

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