Xilinx Zynq 7010 fpga crypto windfall boards

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10 Jul 2025 09:43 #331622 by unknown
Replied by unknown on topic Xilinx Zynq 7010 fpga crypto windfall boards
Ah well ATM everything's out of budget.

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11 Jul 2025 11:43 #331694 by DMNZ
wow, you made so much progress compared to me! i only managed to boot it and connect to it using ethernet to check that its working. it came with crypto software installed which has web server and dhcp configured so i managed to connect to it via browser using ip address.  
now i am waiting for proper jtag that recognized by vivado to start playing with it. 
i too thought about potentially running linuxcnc on zynq but i suspect those cores are just too slow at 600mhz.
I actually like vivado. wouldn't it be nice to have cnc modules (step gens, counters, pwm etc) set as ip blocks in vivado so it can be just visual drug and drop to create configuration you need. 
 

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11 Jul 2025 12:41 #331696 by meister
Replied by meister on topic Xilinx Zynq 7010 fpga crypto windfall boards
this waveshare thing working fine with vivado:
www.amazon.de/dp/B00KM70UFG?ref=ppx_yo2ov_dt_b_fed_asin_title

if you only need to load the bitfile, you can use the installed linux-system.

i know that someone in this forum has running linuxcnc on an raspberry-zero 2 with sdl gui,
this is not so fare away from this cores.

## I actually like vivado. wouldn't it be nice to have cnc modules (step gens, counters, pwm etc) set as ip blocks in vivado so it can be just visual drug and drop to create configuration you need. File Attachment:

hmmm, maybe we can convert some rio plugins into vivado blocks
at the moment the complete rio part is shown as one block in vivado.

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11 Jul 2025 12:56 #331699 by meister
Replied by meister on topic Xilinx Zynq 7010 fpga crypto windfall boards
blocks.tcl

[code]set projectname "rio-rtl"
set part xc7z010clg400-1
set outputdir "./$projectname"

file mkdir $outputdir
create_project -part $part $projectname $outputdir

create_bd_design "blocks"

add_files -norecurse pwmout.v
set module_pwmout [create_bd_cell -type module -reference pwmout pwmout_0]

add_files -norecurse tm1638b8s7l8.v
set module_tm1638b8s7l8 [create_bd_cell -type module -reference tm1638b8s7l8 tm1638b8s7l8_0]



regenerate_bd_layout
save_bd_design
set bdpath [file dirname [get_files [get_property FILE_NAME [current_bd_design]]]]



easier than expected :)

  [attachment=70865]blocks.png[/attachment]
[/code]
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11 Jul 2025 12:57 #331700 by meister
Replied by meister on topic Xilinx Zynq 7010 fpga crypto windfall boards
easier than expected :)
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11 Jul 2025 13:48 #331703 by meister
Replied by meister on topic Xilinx Zynq 7010 fpga crypto windfall boards
but rio is much more than the bitfile generation, it creates the interfaces and linuxcnc configuration.

it would be nice to have a visual editor in rio-setup like the vivado block designer

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11 Jul 2025 19:00 #331709 by unknown
Replied by unknown on topic Xilinx Zynq 7010 fpga crypto windfall boards
Nice work mate

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12 Jul 2025 08:53 #331722 by DMNZ
you got some nice looking board with a heatsink, mine came as if it was found in a dumpster, with dust and corrosion. but surprisingly
it works fine. i agree this is a bargain considering specs with zynq 7010. 
 
 
 
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12 Jul 2025 08:55 #331723 by DMNZ
i can see you configured its zynq ethernet  GMII module in vivado, does it work? have you tried it with lwIP examples to check if udp transport works?

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12 Jul 2025 14:40 - 13 Jul 2025 09:27 #331731 by tokomak
Replied by tokomak on topic Xilinx Zynq 7010 fpga crypto windfall boards
Hello everyone, I got interested in this topic and found this post
Last edit: 13 Jul 2025 09:27 by tokomak.

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