Bitfile for Mesa 7i96s + 7i85 (+Modbus (PKT-Pin))

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10 months 1 week ago #340425 by PCW
I would probably renumber the sserial channels so the 7I85 sserial channels start at 0 rather than 1

Flashing is safe as long as you have a recent mesaflash that supports the 7I96S

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10 months 4 days ago #340617 by TripleM
I tested the bit file...
The good news: nothing is damaged. But I got this error
Code:
Debug file information: Note: Using POSIX realtime hm2/hm2_7i96s.0: Unsupported or inconsistent PktUART TX module (version 3)not loading driver  hm2/hm2_7i96s.0: failed to parse Module Descriptor 12 hm2_eth: rtapi_app_main: Invalid argument (-22)

Should I use version 2?
I change the Version by editing x"03"--> x"02"?:
Code:
(PktUARTTTag,        x"03",    ClockLowTag,            x"01",    PktUARTTDataAddr&PadT,        PktUARTTNumRegs,         x"00",    PktUARTTMPBitMask),         (PktUARTRTag,        x"03",    ClockLowTag,            x"01",    PktUARTRDataAddr&PadT,        PktUARTRNumRegs,        x"00",    PktUARTRMPBitMask),

Code:
Configuration Name: HOSTMOT2 General configuration information:   BoardName : MESA7I96   FPGA Size: 20 KGates   FPGA Pins: 256   Number of IO Ports: 3   Width of one I/O port: 17   Clock Low frequency: 100.0000 MHz   Clock High frequency: 160.0000 MHz   IDROM Type: 3   Instance Stride 0: 4   Instance Stride 1: 64   Register Stride 0: 256   Register Stride 1: 256 Modules in configuration:   Module: DPLL   There are 1 of DPLL in configuration   Version: 0   Registers: 7   BaseAddress: 7000   ClockFrequency: 100.000 MHz   Register Stride: 256 bytes   Instance Stride: 4 bytes   Module: WatchDog   There are 1 of WatchDog in configuration   Version: 0   Registers: 3   BaseAddress: 0C00   ClockFrequency: 100.000 MHz   Register Stride: 256 bytes   Instance Stride: 4 bytes   Module: IOPort   There are 3 of IOPort in configuration   Version: 0   Registers: 5   BaseAddress: 1000   ClockFrequency: 100.000 MHz   Register Stride: 256 bytes   Instance Stride: 4 bytes   Module: OutM   There are 1 of OutM in configuration   Version: 0   Registers: 1   BaseAddress: B000   ClockFrequency: 100.000 MHz   Register Stride: 256 bytes   Instance Stride: 4 bytes   Module: PWM   There are 1 of PWM in configuration   Version: 0   Registers: 5   BaseAddress: 4100   ClockFrequency: 160.000 MHz   Register Stride: 256 bytes   Instance Stride: 4 bytes   Module: StepGen   There are 5 of StepGen in configuration   Version: 2   Registers: 10   BaseAddress: 2000   ClockFrequency: 100.000 MHz   Register Stride: 256 bytes   Instance Stride: 4 bytes   Module: MuxedQCount   There are 6 of MuxedQCount in configuration   Version: 4   Registers: 5   BaseAddress: 3600   ClockFrequency: 100.000 MHz   Register Stride: 256 bytes   Instance Stride: 4 bytes   Module: MuxedQCountSel   There are 1 of MuxedQCountSel in configuration   Version: 0   Registers: 0   BaseAddress: 0000   ClockFrequency: 100.000 MHz   Register Stride: 256 bytes   Instance Stride: 4 bytes   Module: SSerial   There are 1 of SSerial in configuration   Version: 0   Registers: 6   BaseAddress: 5B00   ClockFrequency: 100.000 MHz   Register Stride: 256 bytes   Instance Stride: 64 bytes   Module: SSR   There are 1 of SSR in configuration   Version: 0   Registers: 2   BaseAddress: 7D00   ClockFrequency: 100.000 MHz   Register Stride: 256 bytes   Instance Stride: 4 bytes   Module: InM   There are 1 of InM in configuration   Version: 0   Registers: 5   BaseAddress: 8500   ClockFrequency: 100.000 MHz   Register Stride: 256 bytes   Instance Stride: 4 bytes   Module: LED   There are 1 of LED in configuration   Version: 0   Registers: 1   BaseAddress: 0200   ClockFrequency: 100.000 MHz   Register Stride: 256 bytes   Instance Stride: 4 bytes   Module: PktUARTTX   There are 1 of PktUARTTX in configuration   Version: 3   Registers: 4   BaseAddress: 6100   ClockFrequency: 100.000 MHz   Register Stride: 256 bytes   Instance Stride: 4 bytes   Module: PktUARTRX   There are 1 of PktUARTRX in configuration   Version: 3   Registers: 4   BaseAddress: 6500   ClockFrequency: 100.000 MHz   Register Stride: 256 bytes   Instance Stride: 4 bytes Configuration pin-out: IO Connections for TB3 -> 7I96_0 Pin#                  I/O   Pri. func    Sec. func        Chan     Sec. Pin func   Sec. Pin Dir TB3-1                   0   IOPort       InM              0        Input0_EncA0    (In) TB3-2                   1   IOPort       InM              0        Input1_EncB0    (In) TB3-3                   2   IOPort       InM              0        Input2_EncA1    (In) TB3-4                   3   IOPort       InM              0        Input3_EncB1    (In) TB3-5                   4   IOPort       InM              0        Input4_EncA2    (In) TB3-6                   5   IOPort       InM              0        Input5_EncB2    (In) TB3-7                   6   IOPort       InM              0        Input6_EncA3    (In) TB3-8                   7   IOPort       InM              0        Input7_EncB3    (In) TB3-9                   8   IOPort       InM              0        Input8          (In) TB3-10                  9   IOPort       InM              0        Input9          (In) TB3-11                 10   IOPort       InM              0        Input10         (In) TB3-13,14              11   IOPort       SSR              0        Out-00          (Out) TB3-15,16              12   IOPort       SSR              0        Out-01          (Out) TB3-17,18              13   IOPort       SSR              0        Out-02          (Out) TB3-19,20              14   IOPort       SSR              0        Out-03          (Out) TB3-21,22              15   IOPort       OutM             0        Output4         (Out) TB3-23,24              16   IOPort       OutM             0        Output5         (Out) IO Connections for TB1/TB2 -> 7I96_1 Pin#                  I/O   Pri. func    Sec. func        Chan     Sec. Pin func   Sec. Pin Dir TB1-2,3                17   IOPort       StepGen          0        Step/Table1     (Out) TB1-4,5                18   IOPort       StepGen          0        Dir/Table2      (Out) TB1-8,9                19   IOPort       StepGen          1        Step/Table1     (Out) TB1-10,11              20   IOPort       StepGen          1        Dir/Table2      (Out) TB1-14,15              21   IOPort       StepGen          2        Step/Table1     (Out) TB1-16,17              22   IOPort       StepGen          2        Dir/Table2      (Out) TB1-20,21              23   IOPort       StepGen          3        Step/Table1     (Out) TB1-22,23              24   IOPort       StepGen          3        Dir/Table2      (Out) TB2-2,3                25   IOPort       StepGen          4        Step/Table1     (Out) TB2-4,5                26   IOPort       StepGen          4        Dir/Table2      (Out) TB2-7,8                27   IOPort       MuxedQCount      2        MuxQ-A          (In) TB2-10,11              28   IOPort       MuxedQCount      2        MuxQ-B          (In) TB2-13,14              29   IOPort       MuxedQCount      2        MuxQ-IDX        (In) TB2-16,17              30   IOPort       PktUARTRX        0        RXData          (In) TB2-18,19              31   IOPort       PktUARTTX        0        TXData          (Out) Internal-TXEn          32   IOPort       PktUARTTX        0        TXEna           (Out) Internal               33   IOPort       SSR              0        AC Ref          (Out) IO Connections for P1 -> 7I96_2 Pin#                  I/O   Pri. func    Sec. func        Chan     Sec. Pin func   Sec. Pin Dir P1-01/DB25-01          34   IOPort       SSerial          0        RXData4         (In) P1-02/DB25-14          35   IOPort       SSerial          0        TXData4         (Out) P1-03/DB25-02          36   IOPort       SSerial          0        RXData3         (In) P1-04/DB25-15          37   IOPort       SSerial          0        TXData3         (Out) P1-05/DB25-03          38   IOPort       SSerial          0        RXData2         (In) P1-06/DB25-16          39   IOPort       SSerial          0        TXData2         (Out) P1-07/DB25-04          40   IOPort       SSerial          0        RXData1         (In) P1-08/DB25-17          41   IOPort       SSerial          0        TXData1         (Out) P1-09/DB25-05          42   IOPort       SSerial          0        RXData0         (In) P1-11/DB25-06          43   IOPort       SSerial          0        TXData0         (Out) P1-13/DB25-07          44   IOPort       MuxedQCountSel   0        MuxSel0         (Out) P1-15/DB25-08          45   IOPort       MuxedQCount      0        MuxQ-A          (In) P1-17/DB25-09          46   IOPort       MuxedQCount      0        MuxQ-B          (In) P1-19/DB25-10          47   IOPort       MuxedQCount      0        MuxQ-IDX        (In) P1-21/DB25-11          48   IOPort       MuxedQCount      1        MuxQ-A          (In) P1-23/DB25-12          49   IOPort       MuxedQCount      1        MuxQ-B          (In) P1-25/DB25-13          50   IOPort       MuxedQCount      1        MuxQ-IDX        (In)
    

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10 months 4 days ago #340621 by PCW
Yes, you may need to use pkluart (RX and TX) version 2 if not running the latest LinuxCNC

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10 months 1 day ago #340777 by TripleM
Thanks, with Version 2 it's working, but my 7i84 on the smart serial port didn't work. 
I put de 6-pin connector from the 7i96s to the 7i85 (middle position), so I think the wiring is correct.
What I have to do? Where is the fault?

 

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10 months 1 day ago #340778 by PCW
It could be wiring (serial cable, missing FieldA or FieldB power on 7I84)
or hal file setup.

 

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9 months 4 weeks ago #340919 by TripleM
I have checked the power and the cable, that look fine. (FieldA (24V) or FieldB (5V) power on 7I84)

This is the load line in the hal file:
Code:
loadrt hm2_eth board_ip="192.168.1.121" config="num_encoders=6 num_pwmgens=1 num_stepgens=5 sserial_port_0=2xxxx"

Do I have to add anything if the 7i84 is connected via a daughter card?
 
 

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