RPI5_7i80HDT_7i52s+7i49+7i44+BISS
- HM
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04 Mar 2026 13:49 #343839
by HM
RPI5_7i80HDT_7i52s+7i49+7i44+BISS was created by HM
Hello from the new guy!
I want to equip a relatively large machine with LinuxCNC.
For this, I’ve got the 7i80HDT, 7i52s, 7i49, and 7i44 cards.
Unfortunately, I’m struggling to create a suitable PIN file in Efinity.
Is there a description of what a PIN file should look like?
For example, something like “this block is for the 7i52s, … and the following parameters need to be adjusted.”
I would like to work with two configurations.
If possible, I’d prefer both configurations to be achievable with a single PIN file.
RPI5 to 7I80HDT to
- 7I52S Port 3 only needet in configuration 1
o 6xStep/Dir (output)
o 6xEncoder A/B/Z (input)
- 7I49 Port 2 only needet in configuration 2
- 7I44 Port 1
o 4xSS
o 4xBISS-C with 32Bit Port 5-8
Could it be that the FPGA chip on the 7i80HDT is too small for a configuration where all the mentioned cards are addressed?
Wich one should i choose?
Can someone help me with a PIN-File and/or a description?
That way, I might be able to spot my mistakes as a beginner and learn from them.
What is the meaning of "Unassignet Core Pins [2]" in Efinity (in red) is this important?
What is the meaning of "Missing Interface Pins [1]" is this important?
Best regards,
Michael from Austria
I also strugled with the Errors:
ERROR : C:\Efinity\2024.2\project\7i80hdt-alround-7i52-7i49-7i44\configs\hostmot2\source\7i80hdt-hm2\hostmot2_efx.vhd(1623): index 2 is out of array constraint 0 downto 0 for target 'muxedindex' [VHDL-1123]
Filename.hal:24: parameter or pin `hm2_7i80.0.dpll.01.timer-us`not found 2067
solution: www.forum.linuxcnc.org/27-driver-boards/...1-timer-us-not-found
Problem with locale in PNC-Config
solution: forum.linuxcnc.org/39-pncconf/56472-lc-2...n-unsupported-locale
I want to equip a relatively large machine with LinuxCNC.
For this, I’ve got the 7i80HDT, 7i52s, 7i49, and 7i44 cards.
Unfortunately, I’m struggling to create a suitable PIN file in Efinity.
Is there a description of what a PIN file should look like?
For example, something like “this block is for the 7i52s, … and the following parameters need to be adjusted.”
I would like to work with two configurations.
If possible, I’d prefer both configurations to be achievable with a single PIN file.
RPI5 to 7I80HDT to
- 7I52S Port 3 only needet in configuration 1
o 6xStep/Dir (output)
o 6xEncoder A/B/Z (input)
- 7I49 Port 2 only needet in configuration 2
- 7I44 Port 1
o 4xSS
o 4xBISS-C with 32Bit Port 5-8
Could it be that the FPGA chip on the 7i80HDT is too small for a configuration where all the mentioned cards are addressed?
Wich one should i choose?
Can someone help me with a PIN-File and/or a description?
That way, I might be able to spot my mistakes as a beginner and learn from them.
What is the meaning of "Unassignet Core Pins [2]" in Efinity (in red) is this important?
What is the meaning of "Missing Interface Pins [1]" is this important?
Best regards,
Michael from Austria
I also strugled with the Errors:
ERROR : C:\Efinity\2024.2\project\7i80hdt-alround-7i52-7i49-7i44\configs\hostmot2\source\7i80hdt-hm2\hostmot2_efx.vhd(1623): index 2 is out of array constraint 0 downto 0 for target 'muxedindex' [VHDL-1123]
Filename.hal:24: parameter or pin `hm2_7i80.0.dpll.01.timer-us`not found 2067
solution: www.forum.linuxcnc.org/27-driver-boards/...1-timer-us-not-found
Problem with locale in PNC-Config
solution: forum.linuxcnc.org/39-pncconf/56472-lc-2...n-unsupported-locale
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- PCW
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04 Mar 2026 15:48 #343845
by PCW
Replied by PCW on topic RPI5_7i80HDT_7i52s+7i49+7i44+BISS
Can you post your PINxxxx.vhd file
I can take a look
I can take a look
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