Mesa boards for BP Interact 1 Mk 2 conversion

So there is a limit as to how 'dirty' the input is permitted to be. Presumably there is a spec for that.

That seems to indicate that if the pulse recognition is erratic then it would probably improve if the sample size were to be reduced?

As long as the filtering does not interfere with the maximum encoder count rate,
the slower the filter (higher maxcount) the better.

Actually it would be better to sample very fast and have a higher maxcount,
to avoid quantizing errors in the filter but real world considerations
like logic cell usage and FPGA speed limit this.

Noise on the sampled signal does not prevent the filter from settlling unless
there is so much noise that input is sampled 1/2 the time high and 1/2 the time low.
thats because if the samples of the input signal are more often high than low the counter will drift
towards maxcount, and if samples are more often low than high the counter will drift towards 0.

Once the counter hits maxcount or 0 the output of the filter is set high or low respectively.
Once set, the filter output cannot change until the counter counts to the opposite limit .

Noise does slow the counters progress towards it limits so the bandwidth
for encoder signals is reduced proportionally to the number of noise pulses
sampled

Normally this is not a problem as noise in machine tools is mostly impulse noise (chiefly from motor drives)
so noise pulses tend to be short (due to inductive or capacitive coupling) and not of very high frequency (maybe 4 to 50 KHz) These short and infrequent (relative to the filter sample rate) pulses only cause a minor slowdown of the filters response.

If you have a analog bent, the input filtering is similar to a RC filter followed by a Schmitt trigger

PCW,
thanks, I think I get it now.
Yes, I like the RC + Schmitt analogy.