DIY Mesanet FPGA daughtercard framework ???

Coming back after along hiatus ...

Does there exist a sample project (hardware/software) as a jumping off point for designing a custom daughter board compatible with Mesanet's 50-pin I/O offerings?

Thanks!

Not sure of the exact question

Do you mean is there a public daughterboard design?
Most are pretty simple and I can supply schematics if needed

None of the current 50 pin daughterboards have any firmware except
simple CPLD logic, a couple of the 25 pin daughtercards have DSPs
with firmware however, and all sserial daughtercards have firmware.

PCW wrote:

Not sure of the exact question

Do you mean is there a public daughterboard design?

Yes.

I'm wanting to move ahead with a FANUC interface daughtercard with tri-state I/O and compatible mini-centronics connectors.


Just thinking about making a prototype break-out board that would sit between a 7i80 and FANUC Beta-series amplifiers, both servo and spindle types, and also the i/o modules.

The goal being to replace the FANUC motion controller while retaining the amplifiers and existing I/O cabling.

Edit: I suppose the 7i69 would be a starting point, but it is SSerial connected.

If you wanted to go this way, I _think_ you could do 2 interface channels per daughtercard:

12 PWM
4 control (2 per channel)
4 encoder (2 per channel)
4 SPI/Add for say a AD7265 simultaneous conversion A,D:
SPI-IN
SPI-CS
SPI-CLK
A-D Channel Sel

To avoid direction changes at the FPGA pin level, I would probably use open drain on the PWM pins so when PWM is disabled the pins can be input to read drive status
Open drain should be fine for high speed as long as the termination is 3.3V open circuits at 150 Ohm Thevenin equivalent

Thanks. Really just spitballing at this stage.