5i25 - 7i76 support testers wanted
Are you saying it would be better CPU time wise to deselect components if for instance you only have one 7i76 with a 7i76x2 firmware?
GPIO is much faster then components? That does seem to make sense.
How much real world difference could this make?
Chris M
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PCW
(whose reached a pretty crotchety old age)
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I see my 'not intuitive' comment might seem a pointy remark too (wasn't)
one of the 7i43 firmwares has the lower component numbers on the higher connector number (SV8)
so my error in the XML file did not seem out of place to me.
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on slower cards or if a faster than 1 KHz servo thread is being used
GPIO is usually not an issue and I think the driver always reads/writes all of it anyway
but its only a few read/write cycles for the whole card.
Also like I mentioned before, if unused output functions like PWM.stepgen etc are enabled
you will lose the GPIO function on the affected pins and may cause a conflict with someones
external hardware that expects these pins to stay inputs
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JBlain
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Its a very weird setup to skip the first connector, not only is this likely to trigger pncconf corner conditions
it also is very suboptimal as far as pin use and CPU time goes
I would try an standard config first
That is to say if you are using 4 stepgens they should be stepgen 0, 1, 2, and 3, not 5,6,7 and 8
(which on the standard 7I76x2 config are on the second 7I76 connected to P2 not the normal external P3)
I also note that the 7i76 inputs in the hal file are on sserial channel 0 (on P3)
so if they work, stepgens 5,6,7,8,9 cannot work because they are unconnected (they are on header P2)
So I am looking this up again to fix the XML file description and then I see that the PIN file from Mesa website for the 7i776x2
has step gens 0,1,2,3,4 on P3
Peter can you confirm that this is right or wrong thanks....
Chris M
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stepgens 0..4. encoder 0 and sserial 0,1 on P3
stepgens 5..9, encoder 1 and sserial channels 2,3 on P2
Normally all the low numbered I/O is on P3 (the DB25 on the back of the 5I25)
and the high numbered I/O is on P2 (the 26 pin header)
The pin files are the final reference as they are made by reading the IDROM of the configuration.
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I've found some erros in pncconf with 5i25 + 7i76.
the output in pncconf TAB1 (TB5 Connector) with output NUM23 generates in the hal file the output 16, this output does not exist
an must be 15.
david
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I think you are using a version that I have already fixed though the bug fixes have not been released yet.
unless you are compiling linuxcnc your self or using the buildbot to download linuxcnc this bug may be fixed already...
Chris M
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I've tested the builbod now, but i found no changes?!
deb buildbot.linuxcnc.org/ lucid v2.5_branch-rt
deb-src buildbot.linuxcnc.org/ lucid v2.5_branch-rt
where can i get the newest Software?
david
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