Sieg KX3 and 5i25. Seeking firmware.

cncbasher wrote: the major problem you have is if you want encoders

as i say it's a learning curve and at time may be steep , but their is an active crew here , that will help you through if needed
so dont worry , i'll stick a matching config together in the next day or two for you , for your configuration , along with a basic hal and ini

No, I don't need encoders. Although there's a lathe in the garage that one day will be (L)CNC'd ...

Thanks for your kind help. Now I know it's do-able I can send off for the Mesa kit.

Hi Peter

Grateful thanks also for your help. I'm guessing the .vhd is a source file for the FPGA. If it is, then I'm way out of my depth. I'll have a look, just to scare myself...

John

here's a basic config John, it's nothing fancy , so just use it as a piece of the learning puzzle for now
i'll sort out the firmware shorlty , you'll have it before the board anyhow !

as you can see everything is doable in linuxcnc , ( darn if i can get it to boil the kettle thou)

Cheers!
<off to play with new toy>

cncbasher wrote: use it as a piece of the learning puzzle for now
i'll sort out the firmware shorlty , you'll have it before the board anyhow !

The fog's clearing. I see now how the ini and hal files work; however, the .xml, when it's read by pncconf, just shows up GPIO pins on the // ports, ie no steppers.
EU Surplus, the only European Mesa suppliers I could find, are out of stock of 5i25's...

As you said Sarah, a learning curve.

Also I had a look at the vhd file that PCW kindly posted, and I have edited it as he suggested and attached it. Could one of the experts check it out for errors/plausibility? In particular, in the 'external DB25' section, the steppers that I've added (for spindle step and charge pump) result in the numbers no longer being in a nicely monotonic order.

Regards,

John

John ,
my apologies i have somehow missed your posts above, do you still need a bit file making ?
any help you need ?

Hi Sarah
No need for any apology. It's been an interesting week...

I downloaded the Xilinx Design Suite and followed TomL's guide here . There followed much frustration and lots of googling, but eventually I made a cleaner version of the vhd file than the previous attempt. The final result is a bitfile, but there were ~150 'warnings' along the way. Never having had anything to do with Xilinx, FPGAs etc I've no idea if the bit file is any good and these warnings are 'normal', or if it will sneakily brick any 5i25 it meets.

I could do wth a bit of guidance, though. Would it be possible to check out this bitfile that I made? I need to know if it's going to work when my 5i25 arrives; I don't want to end up with a bricked board. If you could do a bitfile and check mine against it, then that would be really helpful. Also, for some light relief I made an xml file to go with it. This last needs a slight tweak more accurately to reflect the other 2.

















Regards,

John