Spindle configuration for Mesa 5i25 + 7i76

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7 years 1 month ago - 7 years 1 month ago #145755 by TheChosenOne
Spindle configuration for Mesa 5i25 + 7i76 was created by TheChosenOne
Hi,

I connected Mesa 7i76 to VFD as andypugh answered in this topic forum.linuxcnc.org/27-driver-boards/3537...wiring-to-mesa-7i76e and used PnCConf Wizard to save following configuration:

File Attachment:

File Name: sp-864.ini
File Size:4 KB

File Attachment:

File Name: sp-864.hal
File Size:10 KB


Unfortunately I cannot run Linuxcnc due to error:
Code:
./sp-864.hal:197: parameter or pin 'hm2_5i25.0.7i76.0.0.spinout-minlim' not found

Can you please tell me how to fix it?

P.S. I use newest version from master branch
Attachments:
Last edit: 7 years 1 month ago by TheChosenOne.

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7 years 1 month ago - 7 years 1 month ago #145759 by PCW
You will likely get that error if the 7I76 is not discovered. This is most likely because:

1. The 7I76 has no field power /VIN power
(make sure 7I76 W1 is in the left hand position and that 8 to 32VDC are supplied to TB1)

2. The 7I76 has no 5V power (normally is easiest to use FPGA card power for this so
7I76 W2 in left hand position, FPGA card set to supply 5V power on cable)

3. Wrong firmware on FPGA card (verify with mesaflash --readhmid option)

4. Setup/operate jumper (W3) on 7I76 set to setup mode
make sure W3 is in the "left" or operate position
Last edit: 7 years 1 month ago by PCW.
The following user(s) said Thank You: TheChosenOne

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7 years 1 month ago #145762 by TheChosenOne
Replied by TheChosenOne on topic Spindle configuration for Mesa 5i25 + 7i76
Before setting up spindle Linuxcnc run without problems and all axis were moving correctly, so probably 7i76 is discovered and has power(?)

Maybe this report will be helpful:

Warning: Spoiler!

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7 years 1 month ago #145764 by PCW
The log shows that the field I/O / spindle section of the 7I76 was not discovered

step/dir outputs and the encoder will work without this

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7 years 1 month ago - 7 years 1 month ago #145770 by TheChosenOne
Replied by TheChosenOne on topic Spindle configuration for Mesa 5i25 + 7i76
W1, W2 and W3 are in left hand position.

Below is a result of mesaflash command:
Code:
➜ mesaflash git:(master) sudo ./mesaflash --device 5i25 --readhmid Configuration Name: HOSTMOT2 General configuration information: BoardName : MESA5I25 FPGA Size: 9 KGates FPGA Pins: 144 Number of IO Ports: 2 Width of one I/O port: 17 Clock Low frequency: 33.3333 MHz Clock High frequency: 200.0000 MHz IDROM Type: 3 Instance Stride 0: 4 Instance Stride 1: 64 Register Stride 0: 256 Register Stride 1: 256 Modules in configuration: Module: WatchDog There are 1 of WatchDog in configuration Version: 0 Registers: 3 BaseAddress: 0C00 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: IOPort There are 2 of IOPort in configuration Version: 0 Registers: 5 BaseAddress: 1000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: QCount There are 2 of QCount in configuration Version: 2 Registers: 5 BaseAddress: 3000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: SSerial There are 1 of SSerial in configuration Version: 0 Registers: 6 BaseAddress: 5B00 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 64 bytes Module: StepGen There are 10 of StepGen in configuration Version: 2 Registers: 10 BaseAddress: 2000 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Module: LED There are 1 of LED in configuration Version: 0 Registers: 1 BaseAddress: 0200 ClockFrequency: 33.333 MHz Register Stride: 256 bytes Instance Stride: 4 bytes Configuration pin-out: IO Connections for P3 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 0 IOPort StepGen 0 Dir/Table2 (Out) 14 1 IOPort StepGen 0 Step/Table1 (Out) 2 2 IOPort StepGen 1 Dir/Table2 (Out) 15 3 IOPort StepGen 1 Step/Table1 (Out) 3 4 IOPort StepGen 2 Dir/Table2 (Out) 16 5 IOPort StepGen 2 Step/Table1 (Out) 4 6 IOPort StepGen 3 Dir/Table2 (Out) 17 7 IOPort StepGen 3 Step/Table1 (Out) 5 8 IOPort StepGen 4 Dir/Table2 (Out) 6 9 IOPort StepGen 4 Step/Table1 (Out) 7 10 IOPort SSerial 0 TXData1 (Out) 8 11 IOPort SSerial 0 RXData1 (In) 9 12 IOPort SSerial 0 TXData2 (Out) 10 13 IOPort SSerial 0 RXData2 (In) 11 14 IOPort QCount 0 Quad-IDX (In) 12 15 IOPort QCount 0 Quad-B (In) 13 16 IOPort QCount 0 Quad-A (In) IO Connections for P2 Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir 1 17 IOPort StepGen 5 Dir/Table2 (Out) 14 18 IOPort StepGen 5 Step/Table1 (Out) 2 19 IOPort StepGen 6 Dir/Table2 (Out) 15 20 IOPort StepGen 6 Step/Table1 (Out) 3 21 IOPort StepGen 7 Dir/Table2 (Out) 16 22 IOPort StepGen 7 Step/Table1 (Out) 4 23 IOPort StepGen 8 Dir/Table2 (Out) 17 24 IOPort StepGen 8 Step/Table1 (Out) 5 25 IOPort StepGen 9 Dir/Table2 (Out) 6 26 IOPort StepGen 9 Step/Table1 (Out) 7 27 IOPort SSerial 0 TXData3 (Out) 8 28 IOPort SSerial 0 RXData3 (In) 9 29 IOPort SSerial 0 TXData4 (Out) 10 30 IOPort SSerial 0 RXData4 (In) 11 31 IOPort QCount 1 Quad-IDX (In) 12 32 IOPort QCount 1 Quad-B (In) 13 33 IOPort QCount 1 Quad-A (In)

I don't know what it means. Can you please explain?

8 to 32VDC are supplied to TB1

Last edit: 7 years 1 month ago by TheChosenOne.

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7 years 1 month ago - 7 years 1 month ago #145772 by PCW
TB1 (Orange 8 pin terminal block) is the 7I76's field power connection
it needs 8 to 32VDC applied (Plus on pin1 = bottom pin, Minus/Common on top = pin 8)
Last edit: 7 years 1 month ago by PCW.

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