pncconf - feature requests

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01 Oct 2011 06:22 #13574 by ZincBoy
Replied by ZincBoy on topic pncconf - feature requests
Yes, the other GPIO pins act as normal for mesa boards. Input, output, open drain all seem configurable when other functions do not override.

Yes. I am currently trying to compile a new version of the FPGA for my uses :) I don't expect PnCConf to support these odd ball configs, but the standard configs (of which there seem to be three) would be fine.

I think it is the same as for other HostMot2 cards, but I am not sure. The FPGA does have the IDrom config info. When I loadrt the hm2_pci driver, all peripherals seem to be detected. I have not tried this with a custom built FPGA load, but I will let you know how it works :)

Other than the EEPROM/Flash config of the FPGA and the 17 pins per port, this card seem the same as the other Mesa cards. I can't be sure of this, but from reading the driver and the FPGA source it seems to be.

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01 Oct 2011 06:34 #13575 by cmorley
Replied by cmorley on topic pncconf - feature requests
actually 2.5 pncconf has a mechanism to support custom firmware. As long as the components are fairly standard to what pncconf already uses (as far as number of pins of the PWM etc). The biggest deal is building the python firmware array. Really not that big of a deal. I should automate that...
2.4.X requires you to edit pncconf's internal firmware array, in 2.5 it checks a file for extra firmware.

Can you post a print out of the HAL pins the board produces?

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01 Oct 2011 11:22 #13579 by andypugh
Replied by andypugh on topic pncconf - feature requests
cmorley wrote:

Can you post a print out of the HAL pins the board produces?


halcmd: show pin
Component Pins:
Owner Type Dir Value Name
5 s32 OUT 0 hm2_5i25.0.encoder.00.count
5 s32 OUT 0 hm2_5i25.0.encoder.00.count-latched
5 bit I/O FALSE hm2_5i25.0.encoder.00.index-enable
5 bit IN FALSE hm2_5i25.0.encoder.00.latch-enable
5 bit IN FALSE hm2_5i25.0.encoder.00.latch-polarity
5 float OUT 0 hm2_5i25.0.encoder.00.position
5 float OUT 0 hm2_5i25.0.encoder.00.position-latched
5 s32 OUT 0 hm2_5i25.0.encoder.00.rawcounts
5 s32 OUT 0 hm2_5i25.0.encoder.00.rawlatch
5 bit IN FALSE hm2_5i25.0.encoder.00.reset
5 float OUT 0 hm2_5i25.0.encoder.00.velocity
5 s32 OUT 0 hm2_5i25.0.encoder.01.count
5 s32 OUT 0 hm2_5i25.0.encoder.01.count-latched
5 bit I/O FALSE hm2_5i25.0.encoder.01.index-enable
5 bit IN FALSE hm2_5i25.0.encoder.01.latch-enable
5 bit IN FALSE hm2_5i25.0.encoder.01.latch-polarity
5 float OUT 0 hm2_5i25.0.encoder.01.position
5 float OUT 0 hm2_5i25.0.encoder.01.position-latched
5 s32 OUT 0 hm2_5i25.0.encoder.01.rawcounts
5 s32 OUT 0 hm2_5i25.0.encoder.01.rawlatch
5 bit IN FALSE hm2_5i25.0.encoder.01.reset
5 float OUT 0 hm2_5i25.0.encoder.01.velocity
5 bit OUT FALSE hm2_5i25.0.gpio.000.in
5 bit OUT TRUE hm2_5i25.0.gpio.000.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.001.in
5 bit OUT TRUE hm2_5i25.0.gpio.001.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.002.in
5 bit OUT TRUE hm2_5i25.0.gpio.002.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.003.in
5 bit OUT TRUE hm2_5i25.0.gpio.003.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.004.in
5 bit OUT TRUE hm2_5i25.0.gpio.004.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.005.in
5 bit OUT TRUE hm2_5i25.0.gpio.005.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.006.in
5 bit OUT TRUE hm2_5i25.0.gpio.006.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.007.in
5 bit OUT TRUE hm2_5i25.0.gpio.007.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.008.in
5 bit OUT TRUE hm2_5i25.0.gpio.008.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.009.in
5 bit OUT TRUE hm2_5i25.0.gpio.009.in_not
5 bit OUT TRUE hm2_5i25.0.gpio.010.in
5 bit OUT FALSE hm2_5i25.0.gpio.010.in_not
5 bit IN FALSE hm2_5i25.0.gpio.010.out
5 bit OUT FALSE hm2_5i25.0.gpio.011.in
5 bit OUT TRUE hm2_5i25.0.gpio.011.in_not
5 bit IN FALSE hm2_5i25.0.gpio.011.out
5 bit OUT TRUE hm2_5i25.0.gpio.012.in
5 bit OUT FALSE hm2_5i25.0.gpio.012.in_not
5 bit OUT TRUE hm2_5i25.0.gpio.013.in
5 bit OUT FALSE hm2_5i25.0.gpio.013.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.014.in
5 bit OUT TRUE hm2_5i25.0.gpio.014.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.015.in
5 bit OUT TRUE hm2_5i25.0.gpio.015.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.016.in
5 bit OUT TRUE hm2_5i25.0.gpio.016.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.017.in
5 bit OUT TRUE hm2_5i25.0.gpio.017.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.018.in
5 bit OUT TRUE hm2_5i25.0.gpio.018.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.019.in
5 bit OUT TRUE hm2_5i25.0.gpio.019.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.020.in
5 bit OUT TRUE hm2_5i25.0.gpio.020.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.021.in
5 bit OUT TRUE hm2_5i25.0.gpio.021.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.022.in
5 bit OUT TRUE hm2_5i25.0.gpio.022.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.023.in
5 bit OUT TRUE hm2_5i25.0.gpio.023.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.024.in
5 bit OUT TRUE hm2_5i25.0.gpio.024.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.025.in
5 bit OUT TRUE hm2_5i25.0.gpio.025.in_not
5 bit OUT FALSE hm2_5i25.0.gpio.026.in
5 bit OUT TRUE hm2_5i25.0.gpio.026.in_not
5 bit OUT TRUE hm2_5i25.0.gpio.027.in
5 bit OUT FALSE hm2_5i25.0.gpio.027.in_not
5 bit IN FALSE hm2_5i25.0.gpio.027.out
5 bit OUT TRUE hm2_5i25.0.gpio.028.in
5 bit OUT FALSE hm2_5i25.0.gpio.028.in_not
5 bit IN FALSE hm2_5i25.0.gpio.028.out
5 bit OUT TRUE hm2_5i25.0.gpio.029.in
5 bit OUT FALSE hm2_5i25.0.gpio.029.in_not
5 bit IN FALSE hm2_5i25.0.gpio.029.out
5 bit OUT TRUE hm2_5i25.0.gpio.030.in
5 bit OUT FALSE hm2_5i25.0.gpio.030.in_not
5 bit IN FALSE hm2_5i25.0.gpio.030.out
5 bit OUT TRUE hm2_5i25.0.gpio.031.in
5 bit OUT FALSE hm2_5i25.0.gpio.031.in_not
5 bit OUT TRUE hm2_5i25.0.gpio.032.in
5 bit OUT FALSE hm2_5i25.0.gpio.032.in_not
5 bit OUT TRUE hm2_5i25.0.gpio.033.in
5 bit OUT FALSE hm2_5i25.0.gpio.033.in_not
5 bit IN FALSE hm2_5i25.0.led.CR01
5 bit IN FALSE hm2_5i25.0.led.CR02
5 bit IN FALSE hm2_5i25.0.led.CR03
5 bit IN FALSE hm2_5i25.0.led.CR04
5 bit IN FALSE hm2_5i25.0.led.CR05
5 bit IN FALSE hm2_5i25.0.led.CR06
5 bit IN FALSE hm2_5i25.0.led.CR07
5 bit IN FALSE hm2_5i25.0.led.CR08
5 bit IN FALSE hm2_5i25.0.stepgen.00.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.00.counts
5 float OUT 0 hm2_5i25.0.stepgen.00.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.00.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.00.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.00.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.00.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.00.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.00.enable
5 float IN 0 hm2_5i25.0.stepgen.00.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.00.position-fb
5 float IN 0 hm2_5i25.0.stepgen.00.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.00.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.01.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.01.counts
5 float OUT 0 hm2_5i25.0.stepgen.01.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.01.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.01.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.01.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.01.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.01.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.01.enable
5 float IN 0 hm2_5i25.0.stepgen.01.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.01.position-fb
5 float IN 0 hm2_5i25.0.stepgen.01.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.01.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.02.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.02.counts
5 float OUT 0 hm2_5i25.0.stepgen.02.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.02.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.02.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.02.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.02.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.02.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.02.enable
5 float IN 0 hm2_5i25.0.stepgen.02.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.02.position-fb
5 float IN 0 hm2_5i25.0.stepgen.02.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.02.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.03.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.03.counts
5 float OUT 0 hm2_5i25.0.stepgen.03.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.03.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.03.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.03.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.03.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.03.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.03.enable
5 float IN 0 hm2_5i25.0.stepgen.03.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.03.position-fb
5 float IN 0 hm2_5i25.0.stepgen.03.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.03.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.04.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.04.counts
5 float OUT 0 hm2_5i25.0.stepgen.04.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.04.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.04.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.04.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.04.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.04.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.04.enable
5 float IN 0 hm2_5i25.0.stepgen.04.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.04.position-fb
5 float IN 0 hm2_5i25.0.stepgen.04.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.04.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.05.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.05.counts
5 float OUT 0 hm2_5i25.0.stepgen.05.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.05.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.05.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.05.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.05.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.05.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.05.enable
5 float IN 0 hm2_5i25.0.stepgen.05.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.05.position-fb
5 float IN 0 hm2_5i25.0.stepgen.05.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.05.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.06.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.06.counts
5 float OUT 0 hm2_5i25.0.stepgen.06.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.06.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.06.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.06.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.06.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.06.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.06.enable
5 float IN 0 hm2_5i25.0.stepgen.06.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.06.position-fb
5 float IN 0 hm2_5i25.0.stepgen.06.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.06.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.07.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.07.counts
5 float OUT 0 hm2_5i25.0.stepgen.07.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.07.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.07.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.07.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.07.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.07.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.07.enable
5 float IN 0 hm2_5i25.0.stepgen.07.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.07.position-fb
5 float IN 0 hm2_5i25.0.stepgen.07.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.07.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.08.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.08.counts
5 float OUT 0 hm2_5i25.0.stepgen.08.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.08.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.08.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.08.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.08.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.08.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.08.enable
5 float IN 0 hm2_5i25.0.stepgen.08.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.08.position-fb
5 float IN 0 hm2_5i25.0.stepgen.08.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.08.velocity-fb
5 bit IN FALSE hm2_5i25.0.stepgen.09.control-type
5 s32 OUT 0 hm2_5i25.0.stepgen.09.counts
5 float OUT 0 hm2_5i25.0.stepgen.09.dbg_err_at_match
5 float OUT 0 hm2_5i25.0.stepgen.09.dbg_ff_vel
5 float OUT 0 hm2_5i25.0.stepgen.09.dbg_pos_minus_prev_
5 float OUT 0 hm2_5i25.0.stepgen.09.dbg_s_to_match
5 s32 OUT 0 hm2_5i25.0.stepgen.09.dbg_step_rate
5 float OUT 0 hm2_5i25.0.stepgen.09.dbg_vel_error
5 bit IN FALSE hm2_5i25.0.stepgen.09.enable
5 float IN 0 hm2_5i25.0.stepgen.09.position-cmd
5 float OUT 0 hm2_5i25.0.stepgen.09.position-fb
5 float IN 0 hm2_5i25.0.stepgen.09.velocity-cmd
5 float OUT 0 hm2_5i25.0.stepgen.09.velocity-fb
5 bit I/O FALSE hm2_5i25.0.watchdog.has_bit

halcmd: show param
Parameters:
Owner Type Dir Value Name
5 bit RW FALSE hm2_5i25.0.encoder.00.counter-mode
5 bit RW TRUE hm2_5i25.0.encoder.00.filter
5 bit RW FALSE hm2_5i25.0.encoder.00.index-invert
5 bit RW FALSE hm2_5i25.0.encoder.00.index-mask
5 bit RW FALSE hm2_5i25.0.encoder.00.index-mask-invert
5 float RW 1 hm2_5i25.0.encoder.00.scale
5 float RW 0.5 hm2_5i25.0.encoder.00.vel-timeout
5 bit RW FALSE hm2_5i25.0.encoder.01.counter-mode
5 bit RW TRUE hm2_5i25.0.encoder.01.filter
5 bit RW FALSE hm2_5i25.0.encoder.01.index-invert
5 bit RW FALSE hm2_5i25.0.encoder.01.index-mask
5 bit RW FALSE hm2_5i25.0.encoder.01.index-mask-invert
5 float RW 1 hm2_5i25.0.encoder.01.scale
5 float RW 0.5 hm2_5i25.0.encoder.01.vel-timeout
5 bit RW FALSE hm2_5i25.0.gpio.000.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.000.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.001.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.001.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.002.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.002.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.003.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.003.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.004.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.004.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.005.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.005.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.006.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.006.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.007.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.007.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.008.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.008.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.009.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.009.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.010.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.010.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.010.is_output
5 bit RW FALSE hm2_5i25.0.gpio.011.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.011.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.011.is_output
5 bit RW FALSE hm2_5i25.0.gpio.012.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.012.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.017.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.017.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.018.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.018.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.019.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.019.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.020.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.020.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.021.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.021.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.022.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.022.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.023.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.023.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.024.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.024.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.025.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.025.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.026.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.026.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.027.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.027.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.027.is_output
5 bit RW FALSE hm2_5i25.0.gpio.028.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.028.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.028.is_output
5 bit RW FALSE hm2_5i25.0.gpio.029.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.029.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.029.is_output
5 bit RW FALSE hm2_5i25.0.gpio.030.invert_output
5 bit RW FALSE hm2_5i25.0.gpio.030.is_opendrain
5 bit RW FALSE hm2_5i25.0.gpio.030.is_output
5 bit RW FALSE hm2_5i25.0.io_error
5 s32 RO 0 hm2_5i25.0.pet_watchdog.time
5 s32 RW 0 hm2_5i25.0.pet_watchdog.tmax
5 s32 RO 0 hm2_5i25.0.read.time
5 s32 RW 0 hm2_5i25.0.read.tmax
5 s32 RO 0 hm2_5i25.0.read_gpio.time
5 s32 RW 0 hm2_5i25.0.read_gpio.tmax
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.00.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.00.maxvel
5 float RW 1 hm2_5i25.0.stepgen.00.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.00.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.00.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.01.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.01.maxvel
5 float RW 1 hm2_5i25.0.stepgen.01.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.01.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.01.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.02.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.02.maxvel
5 float RW 1 hm2_5i25.0.stepgen.02.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.02.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.02.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.03.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.03.maxvel
5 float RW 1 hm2_5i25.0.stepgen.03.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.03.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.03.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.04.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.04.maxvel
5 float RW 1 hm2_5i25.0.stepgen.04.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.04.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.04.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.05.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.05.maxvel
5 float RW 1 hm2_5i25.0.stepgen.05.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.05.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.05.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.06.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.06.maxvel
5 float RW 1 hm2_5i25.0.stepgen.06.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.06.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.06.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.07.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.07.maxvel
5 float RW 1 hm2_5i25.0.stepgen.07.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.07.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.07.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.08.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.08.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.08.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.08.maxvel
5 float RW 1 hm2_5i25.0.stepgen.08.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.08.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.08.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.08.stepspace
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.09.dirhold
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.09.dirsetup
5 float RW 1 hm2_5i25.0.stepgen.09.maxaccel
5 float RW 0 hm2_5i25.0.stepgen.09.maxvel
5 float RW 1 hm2_5i25.0.stepgen.09.position-scale
5 u32 RW 0x00000000 hm2_5i25.0.stepgen.09.step_type
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.09.steplen
5 u32 RW 0x00077FE2 hm2_5i25.0.stepgen.09.stepspace
5 u32 RW 0x3B9ACA00 hm2_5i25.0.watchdog.timeout_ns
5 s32 RO 0 hm2_5i25.0.write.time
5 s32 RW 0 hm2_5i25.0.write.tmax
5 s32 RO 0 hm2_5i25.0.write_gpio.time
5 s32 RW 0 hm2_5i25.0.write_gpio.tmax


[ 251.836488] hm2/hm2_5i25.0: IO Pin 000 (P3-01): StepGen #0, pin Direction (Output)
[ 251.836528] hm2/hm2_5i25.0: IO Pin 001 (P3-14): StepGen #0, pin Step (Output)
[ 251.836540] hm2/hm2_5i25.0: IO Pin 002 (P3-02): StepGen #1, pin Direction (Output)
[ 251.836550] hm2/hm2_5i25.0: IO Pin 003 (P3-15): StepGen #1, pin Step (Output)
[ 251.836559] hm2/hm2_5i25.0: IO Pin 004 (P3-03): StepGen #2, pin Direction (Output)
[ 251.836569] hm2/hm2_5i25.0: IO Pin 005 (P3-16): StepGen #2, pin Step (Output)
[ 251.836579] hm2/hm2_5i25.0: IO Pin 006 (P3-04): StepGen #3, pin Direction (Output)
[ 251.836589] hm2/hm2_5i25.0: IO Pin 007 (P3-17): StepGen #3, pin Step (Output)
[ 251.836599] hm2/hm2_5i25.0: IO Pin 008 (P3-05): StepGen #4, pin Direction (Output)
[ 251.836609] hm2/hm2_5i25.0: IO Pin 009 (P3-06): StepGen #4, pin Step (Output)
[ 251.836618] hm2/hm2_5i25.0: IO Pin 010 (P3-07): IOPort
[ 251.836627] hm2/hm2_5i25.0: IO Pin 011 (P3-08): IOPort
[ 251.836637] hm2/hm2_5i25.0: IO Pin 012 (P3-09): Smart Serial Interface #0, pin TxData1 (Output)
[ 251.836648] hm2/hm2_5i25.0: IO Pin 013 (P3-10): Smart Serial Interface #0, pin RxData1 (Input)
[ 251.836658] hm2/hm2_5i25.0: IO Pin 014 (P3-11): Encoder #0, pin Index (Input)
[ 251.836668] hm2/hm2_5i25.0: IO Pin 015 (P3-12): Encoder #0, pin B (Input)
[ 251.836678] hm2/hm2_5i25.0: IO Pin 016 (P3-13): Encoder #0, pin A (Input)
[ 251.836688] hm2/hm2_5i25.0: IO Pin 017 (P2-01): StepGen #5, pin Direction (Output)
[ 251.836698] hm2/hm2_5i25.0: IO Pin 018 (P2-14): StepGen #5, pin Step (Output)
[ 251.836708] hm2/hm2_5i25.0: IO Pin 019 (P2-02): StepGen #6, pin Direction (Output)
[ 251.836718] hm2/hm2_5i25.0: IO Pin 020 (P2-15): StepGen #6, pin Step (Output)
[ 251.836728] hm2/hm2_5i25.0: IO Pin 021 (P2-03): StepGen #7, pin Direction (Output)
[ 251.836738] hm2/hm2_5i25.0: IO Pin 022 (P2-16): StepGen #7, pin Step (Output)
[ 251.836748] hm2/hm2_5i25.0: IO Pin 023 (P2-04): StepGen #8, pin Direction (Output)
[ 251.836757] hm2/hm2_5i25.0: IO Pin 024 (P2-17): StepGen #8, pin Step (Output)
[ 251.836768] hm2/hm2_5i25.0: IO Pin 025 (P2-05): StepGen #9, pin Direction (Output)
[ 251.836778] hm2/hm2_5i25.0: IO Pin 026 (P2-06): StepGen #9, pin Step (Output)
[ 251.836787] hm2/hm2_5i25.0: IO Pin 027 (P2-07): IOPort
[ 251.836795] hm2/hm2_5i25.0: IO Pin 028 (P2-08): IOPort
[ 251.836803] hm2/hm2_5i25.0: IO Pin 029 (P2-09): IOPort
[ 251.836812] hm2/hm2_5i25.0: IO Pin 030 (P2-10): IOPort
[ 251.836821] hm2/hm2_5i25.0: IO Pin 031 (P2-11): Encoder #1, pin Index (Input)
[ 251.836831] hm2/hm2_5i25.0: IO Pin 032 (P2-12): Encoder #1, pin B (Input)
[ 251.836841] hm2/hm2_5i25.0: IO Pin 033 (P2-13): Encoder #1, pin A (Input)

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02 Oct 2011 01:45 #13593 by cmorley
Replied by cmorley on topic pncconf - feature requests
hmm seems pretty doable. is there any PIN file for the firmware?

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02 Oct 2011 05:57 #13596 by cmorley
Replied by cmorley on topic pncconf - feature requests
what does the hostmot2 load line look like?
Is there a man page on the 7i25?

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02 Oct 2011 06:47 #13597 by cmorley
Replied by cmorley on topic pncconf - feature requests
i found the PIN files on the Mesa site. I assume this was 7i76X2

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02 Oct 2011 09:01 #13599 by cmorley
Replied by cmorley on topic pncconf - feature requests
I have pushed to 2.5 most of what is needed to support the 5i25, aside from the HAL code to actually load the 5i25
(it has to be different if it doesn't load firmware each time)

one also has to use the 'back-door' way of adding custom firmware to PNCconf, using a file with a python array.

File Attachment:

File Name: custom_firmware.zip
File Size:1 KB


Andy, would you be willing to test ?
You remember how you added custom firmware last time?

It should work aside from loading the card. (in other words you will need to hand-edit the loadrt hm2_pci line.)
Attachments:

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02 Oct 2011 12:08 #13601 by BigJohnT
Replied by BigJohnT on topic pncconf - feature requests
Chris,

I have a 5i25 and 7i76 coming next week and will test pncconf when it arrives.

John

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02 Oct 2011 15:27 #13606 by PCW
Replied by PCW on topic pncconf - feature requests
All thats required there is deleting the "firmware=blahblahblah"

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02 Oct 2011 20:13 #13609 by cmorley
Replied by cmorley on topic pncconf - feature requests
thanks Peter I will work on supporting that.

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