Mesa 7i96s: differential DRO inputs? & are ENC A and ENC B reqd for threading?

I have a two questions I hope someone can answer.

I have a Omron spindle encoder with single ended A,B and I signals, plan to connect these to ENCA, ENCB and ENCIndex.
1) Unless Linux only needs the Ix input?

I also have two scales on my lathe:
The Z scale has single ended quadrature signals "A" & "B" and I plan to use the first two isolated inputs for these IP0, IP1.

The X scale uses differential signalling "A+". "A-", "B+", "B-". I suppose I could connect this single ended to IP2, IP3 but I loose the benefit of the differential signaling. However if Linux only needs the Ix signal (and not the quadrature A and B signals) from the spindle, I suppose I could use ENC A and ENC B for the differential signalling from the X scale.
2) I'm not sure if encoder A, B, and Index are all needed for spindle feedback to Linux? If only the index signal is required can I use ENCA and ENC B for my X scale quadrature signals?
 

The spindle needs A and Index or A/B and index.

Note that the MPG encoder inputs on TB3 are fairly
slow so may not be suitable for axis scales.

PCW wrote:

The spindle needs A and Index or A/B and index.

Note that the MPG encoder inputs on TB3 are fairly
slow so may not be suitable for axis scales.
 

Hmmm....

Lot's of questions and limited knowledge on my side.

Do you know if the isolated encoder inputs are fairly slow because of the opto's or is it the sample speed of those inputs by the FPGA?
If I instead use the inputs available on the expansion connector:
a) Are they fast enough to keep up with the scale data?
b) How would I configure those inputs as quadrature inputs so I can route the results to the DRO display in Linux? Can I do this in HAL?
c) If there is not a way to configure those pairs of inputs as quadrature inputs?

I suppose I could decode the quadrature signals by using a flip-flop in HAL to give direction and then just count pulses for the count, not sure if HAL is fast enough to not miss the counts especially when I do a change of direction? I have a vague image in my mind of a HAL based up-down counter with the flip-flop driving the direction and say the A signal driving the counter clock, hopefully such a counter exists?



Not sure if there is any protection on the expansion pins (I'm guessing direct to FPGA), so either I make a fast isolator board (assuming the inputs are actually scanned quickly) or I take ESD precautions when connecting and just risk it. The DRO pickups will be powered via the 5V on the 7i96s so they will not be powered when the 7i96s is not so will not be driving the unprotected pins when the Mesa board is not energized. Comments/Suggestions welcome.

The isolated input speed limit is mainly determined by the OPTOs,
Though you will likely need to set the inm module scan rate up above the
default 20 KHz.

You can use the expansion port GPIO pins but they are basically bare FPGA pins.
The GPIO have circuitry for 5V tolerance and will accept inputs
to +7V without damage but must be protected from negative spikes
that exceed the input protection diode current limits (10 ma).

Encoder signals tend to be noisy so I would add a say 220 ohm series
resistor to limit the maximum current of negative spikes.

There is no issue with applying 5V signals to the expansion connector
with 7I96S power off, as the bus-switch in series with the I/O pins
is disabled until the FPGA is powered and configured.

There is standard firmware that adds an additional INM module to the expansion
port (so adds 4 MPG encoder counters) :

7i96sd_mpgp1.bin

If you wanted normal high speed (MHz) encoders, 7I96S firmware can be made
that includes a number of these on the parallel expansion connector.

Another option is to add a 7I85/7I85S which support 4 encoders in single
ended or differential mode with appropriate signal conditioning. There
is standard 7i96S firmware to support these daughtercards.