Mesa 7i90 in SPI mode
14 Mar 2017 12:28 #89579
by PKM
Replied by PKM on topic Mesa 7i90 in SPI mode
So, mesaflash compiled well, but it can't see 7i90 on my Pi 2.
Another question: what are symptoms of lost connection?
Say, I loaded hm2_rpspi and addf-ed it to a thread, so I can control CR leds. After 3-4 hrs, I can still issue setp and it works. Does it mean that the connection has been stable and never lost?
Another question: what are symptoms of lost connection?
Say, I loaded hm2_rpspi and addf-ed it to a thread, so I can control CR leds. After 3-4 hrs, I can still issue setp and it works. Does it mean that the connection has been stable and never lost?
Please Log in or Create an account to join the conversation.
14 Mar 2017 13:36 #89584
by andypugh
Replied by andypugh on topic Mesa 7i90 in SPI mode
If that is the case then it at least means that the watchdog has never bitten, so there has been no interruption in the read/write sequence.
The following user(s) said Thank You: PKM
Please Log in or Create an account to join the conversation.
- sleepybishop
- Offline
- Junior Member
Less
More
- Posts: 24
- Thank you received: 1
20 Mar 2017 17:49 #89957
by sleepybishop
Replied by sleepybishop on topic Mesa 7i90 in SPI mode
i noticed on my machines that sometimes mesaflash would only work after a fresh boot, if i had started and stopped linuxcnc, eg modules were loaded. then the card wouldnt be detected. what is the output of mesaflash?
you can also try running this tool too see if the card is responding with a "AA AA AA AA" preamble on /dev/spidev0.0
github.com/torvalds/linux/blob/master/tools/spi/spidev_test.c
also wrt to kernel build times, i used to have a separate box running distcc to cross compile kernels but it fried, i just compiled 4.9.15 directly on some boards, it took about 4 hours on a pi 3 and 16 hours on a pi zero.
you can also try running this tool too see if the card is responding with a "AA AA AA AA" preamble on /dev/spidev0.0
github.com/torvalds/linux/blob/master/tools/spi/spidev_test.c
also wrt to kernel build times, i used to have a separate box running distcc to cross compile kernels but it fried, i just compiled 4.9.15 directly on some boards, it took about 4 hours on a pi 3 and 16 hours on a pi zero.
The following user(s) said Thank You: PKM
Please Log in or Create an account to join the conversation.
20 Mar 2017 19:06 #89962
by jtheath
Replied by jtheath on topic Mesa 7i90 in SPI mode
One thing to note, mesaflash and spidev_test both assume the standard spi driver is loaded and available. The hm2_rpspi solution goes directly to the low-level hardware and at least originally required disabling the standard spi driver.
The following user(s) said Thank You: PKM
Please Log in or Create an account to join the conversation.
21 Mar 2017 20:58 #90030
by PKM
Replied by PKM on topic Mesa 7i90 in SPI mode
Right, I did not enable SPI in config.txt before, thanks for the hint!
Now mesaflash works (at least readhmid is OK).
And yes, loading hm2_spi breaks it. Mesaflash shows something about wrong cookie FFFF FFFF FFFF. Not a big deal, of course.
Now mesaflash works (at least readhmid is OK).
And yes, loading hm2_spi breaks it. Mesaflash shows something about wrong cookie FFFF FFFF FFFF. Not a big deal, of course.
Please Log in or Create an account to join the conversation.
21 Mar 2017 21:10 #90031
by jtheath
Replied by jtheath on topic Mesa 7i90 in SPI mode
If interested there is an updated hm2_spi.c which allows for 8-bit words here,
github.com/resojoe/linuxcnc/tree/master/...rivers/mesa-hostmot2
github.com/resojoe/linuxcnc/tree/master/...rivers/mesa-hostmot2
Please Log in or Create an account to join the conversation.
21 Mar 2017 21:22 #90032
by PKM
Replied by PKM on topic Mesa 7i90 in SPI mode
Thanks, I'll try that!
Why wouldn't you send a PR against the main repo?
BTW I noticed that mesaflash says something about 32-bit failing, using 8-bit...
Why wouldn't you send a PR against the main repo?
BTW I noticed that mesaflash says something about 32-bit failing, using 8-bit...
Please Log in or Create an account to join the conversation.
21 Mar 2017 22:13 #90035
by jtheath
Replied by jtheath on topic Mesa 7i90 in SPI mode
Have personally seen a few SPI timeout messages when running. Likely need to update standard RPi spidev driver code to provide better determinism.
Also need to completely comment these changes prior to submission.
The 7i90 expects 32-bit transfers and was originally developed using hardware which provides 32-bit words when using SPI. Thus mesaflash configures the hardware for 32-bit words. The RPi, Pine and others only allow for 8-bit SPI "word" sizes. These SBCs reject the 32-bit request. Instead of failing and exiting mesaflash now sets 8-bit words and orders the bytes for correct transmission.
Also need to completely comment these changes prior to submission.
The 7i90 expects 32-bit transfers and was originally developed using hardware which provides 32-bit words when using SPI. Thus mesaflash configures the hardware for 32-bit words. The RPi, Pine and others only allow for 8-bit SPI "word" sizes. These SBCs reject the 32-bit request. Instead of failing and exiting mesaflash now sets 8-bit words and orders the bytes for correct transmission.
Please Log in or Create an account to join the conversation.
16 May 2017 20:54 #93278
by PKM
Replied by PKM on topic Mesa 7i90 in SPI mode
OK I connected a stepper drive (with optocoupled input) to 7i90 pins and now watchdog bites shortly after the start. Pretty unusable setup...
Please Log in or Create an account to join the conversation.
16 May 2017 21:05 #93279
by PCW
Replied by PCW on topic Mesa 7i90 in SPI mode
The SPI interface is quite susceptible to noise
This can be improved by:
1. Keeping the SPI cable short (a few inches max)
2. Using all the 26 pin cable grounds
(to lower inductance so stray HF currents dont generate much ground bumping)
Its probably possible to improve the noise situation (at the expense of speed) on the
FPGA RX side by digital filtering the RX data and clock
and on the RSPI RX side with a RC filter on the data from the 7I90
This can be improved by:
1. Keeping the SPI cable short (a few inches max)
2. Using all the 26 pin cable grounds
(to lower inductance so stray HF currents dont generate much ground bumping)
Its probably possible to improve the noise situation (at the expense of speed) on the
FPGA RX side by digital filtering the RX data and clock
and on the RSPI RX side with a RC filter on the data from the 7I90
Please Log in or Create an account to join the conversation.
Time to create page: 0.117 seconds