ColorCNC Colorlight 5A-75E/5A-75B as FPGA controller board

I used FT232RL firmware interface converter
 

The jumper for selecting the output supply voltage has been removed, they are powered from contact J33,34
The firmware method is taken from here
openFPGALoader [options] -cft23XXX --pins=TDI:TDO:TCK:TMS /path/to/bitstream.ext

value        |    ID    |    JTAG

---

TXD        |    0    |    J27 TCK
RXD        |    1    |    J32 TDI 
RTS        |    2    |    
CTS        |    3    |    J31 TMS
DTR        |    4    |    J30 TDO
DSR        |    5    |
DCD        |    6    |
RI        |    7    |
Vcc        |        |    J33 (3.3в)
GND        |        |    J34 (GND)

We use the command

To compile the firmware, it is better to use the command with the -a parameter

We will additionally receive the alias.hal file which, when used in LinuxCNC, will give us aliases for the module elements and when changing the firmware, there will be no need to change the hal files.
To use aliases in the ini file, you must first specify the hal file with the litexcnc driver connection, then alias.hal and then the hal file with module processing. Only in this case will everything work!!!

I am attaching all the files of my 5-axis machine with the ability to work only with stepper motors, motors and an ecoder and in ClosedLoop mode. Spindle control via RS485 with a frequency converter. Additionally, the xhc-hb04 remote control is connected.
 

For fun, I did a test, I knew the result in advance.
LinuxCNC 2.9.4
Litex-CNC 1.3.4
The same file was used for the machine operation.

Debian 10 (Buster)
 

Debian 12 (Bookworm)
 

In Debian 12, the jitter is several times higher and this is very noticeable in the operation of the engines in ClosedLoop mode

 

Hello,
Recently I bought a 5A-75E v8.2 board, but I can't get the JTAG programming to work.
I have used the configuration file for v6.0 to build the firmware.

openFPGALoader detects the FPGA correctly, but when I attempt to flash it, it throws the following error.

I have checked my connections multiple times, they are correct. What is the issue here? Is it maybe because of dirtyJtag?

Nevermind, I have changed the JTAG programmer to USB Blaster and everything went fine.

My board responds to pings, but seems to drop 50% of the packets, is this normal?

Anyone have a Lattice Diamond project for the Colorlight v8 board?

I bought the board and a HW-USBN-2A jtag programmer.. however, the litex .bit file generated doesn't seem to do anything.. no led activity, no button response, no serial output etc.

So just want to take a step back, and see if I a simple blink-led project, synthesized in Diamond works.
 

minimal fpga project, just edit the pins file to match your pinout:
github.com/multigcs/FPGA-blinky/tree/main/Colorlight5A-75E

i can't remember but i think it was already for the v8.2 board

if it works, you can take a look here:
github.com/multigcs/riocore/tree/dev/rio...olorlight5A-75B-v8.0

I found a few lpf files.. like the one litex generates, and the one here:
github.com/ZeroMips/Colorlight-5A-75B-gp.../master/gpiotest.lpf

However, when I program the bitstream, it doesn't seem to be doing anything. Even a simple led blink. 

Opening the lpf in Lattice Diamond, I notice that these lpf files show errors in the spreadsheet view.. so I think Lattice is ignoring the pin assignments all together?

 

A Week of Python Purgatory: My Colorlight 5A-75B Still Thinks It's a Paperweight!
The Config (JSON files): I’ve attached my current JSON setup (j1.jpg and j2.jpg). I’ve spent a week tweaking these pins for my 6-axis setup, but I’m not 100% sure if LiteXCNC likes how I’ve named things or if my GPIO mapping is actually valid for the v8.2 board.

The Environment: My pip list shows I’m in a clean venv with LiteX-2025.12.

Questions for the Pros:

JSON Review: Can someone look at my modules and instances in the attached JSON? Does the way I defined axis_x through axis_c look correct for a 6-axis machine?

Watchdog: Is my timeout: 10000000 in the JSON too high, or is it okay for a standard setup?

Buffer Chips (v8.2): Based on my GPIO pin choices in the JSON, will I run into trouble with the buffer chips on this v8.2 board when connecting to 5V drivers?
The Current Setup:

OS: Debian 12 (Bookworm) with a Python Virtual Environment. (Debian is no longer silently judging me, but my Mini PC is).

Board: Colorlight 5A-75B v8.2.

Toolchain: Yosys and Nextpnr-ecp5 are installed.

Goal: A 6-axis CNC beast, controlled by Ethernet.
I have my pip list showing the full LiteX-2025.12 venv. Can someone please review my synthesis log to see why I am not generating a bitstream, even with yosys and nextpnr installed?

I’ve attached the evidence: my pip list, terminal outputs (json_1.png and json_2.png for the JSON files), and my which python3 output (proving I’m not crazy). Any advice from someone who’s survived a week in "Python Purgatory" would be amazing!

Thanks,
Jaae