Where to start with Mesa 7i92 + 7i85S
07 Jan 2016 16:16 - 07 Jan 2016 16:17 #68021
by PCW
Replied by PCW on topic Where to start with Mesa 7i92 + 7i85S
The uspace version of linuxcnc will print the pinout in the terminal if
linuxcnc is launched from a terminal, not sure if its logged anywhere else
Thats why I suggested:
mesaflash --device 7i92 --readhmid
Since it will print out a formatted pinout (same as a .pin file)
linuxcnc is launched from a terminal, not sure if its logged anywhere else
Thats why I suggested:
mesaflash --device 7i92 --readhmid
Since it will print out a formatted pinout (same as a .pin file)
Last edit: 07 Jan 2016 16:17 by PCW.
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07 Jan 2016 22:08 - 07 Jan 2016 22:13 #68032
by Jrjones
Replied by Jrjones on topic Where to start with Mesa 7i92 + 7i85S
Ok, I've got the 7i92_7i85sx2D.bit firmware flashed to the 7i92.
The readhmid command gives me this output, which looks right from the 7i85S documentation.
I'm a little confused how to configure a 5i25, since the 7i85S doesn't appear under the firmware list, and none of the options let me select 6 PWM generators and 3 encoders.
As an aside, is it a problem that the machine doesn't have any home/limit switches? With the Prototrak software, you manually moved the mill to a position and set that as home.
The readhmid command gives me this output, which looks right from the 7i85S documentation.
Configuration Name: HOSTMOT2
General configuration information:
BoardName : MESA7I92
FPGA Size: 9 KGates
FPGA Pins: 144
Number of IO Ports: 2
Width of one I/O port: 17
Clock Low frequency: 100.0000 MHz
Clock High frequency: 200.0000 MHz
IDROM Type: 3
Instance Stride 0: 4
Instance Stride 1: 64
Register Stride 0: 256
Register Stride 1: 256
Modules in configuration:
Module: DPLL
There are 1 of DPLL in configuration
Version: 0
Registers: 7
BaseAddress: 7000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: WatchDog
There are 1 of WatchDog in configuration
Version: 0
Registers: 3
BaseAddress: 0C00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: IOPort
There are 2 of IOPort in configuration
Version: 0
Registers: 5
BaseAddress: 1000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: MuxedQCount
There are 8 of MuxedQCount in configuration
Version: 3
Registers: 5
BaseAddress: 3500
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: MuxedQCountSel
There are 1 of MuxedQCountSel in configuration
Version: 0
Registers: 0
BaseAddress: 0000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: SSerial
There are 1 of SSerial in configuration
Version: 0
Registers: 6
BaseAddress: 5A00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 64 bytes
Module: StepGen
There are 8 of StepGen in configuration
Version: 2
Registers: 10
BaseAddress: 2000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: LED
There are 1 of LED in configuration
Version: 0
Registers: 1
BaseAddress: 0200
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Configuration pin-out:
IO Connections for P2
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
1 0 IOPort SSerial 0 RXData1 (In)
14 1 IOPort SSerial 0 TXData1 (Out)
2 2 IOPort StepGen 3 Step/Table1 (Out)
15 3 IOPort StepGen 3 Dir/Table2 (Out)
3 4 IOPort StepGen 2 Step/Table1 (Out)
16 5 IOPort StepGen 2 Dir/Table2 (Out)
4 6 IOPort StepGen 1 Step/Table1 (Out)
17 7 IOPort StepGen 1 Dir/Table2 (Out)
5 8 IOPort StepGen 0 Step/Table1 (Out)
6 9 IOPort StepGen 0 Dir/Table2 (Out)
7 10 IOPort MuxedQCountSel 0 MuxSel0 (Out)
8 11 IOPort MuxedQCount 0 MuxQ-A (In)
9 12 IOPort MuxedQCount 0 MuxQ-B (In)
10 13 IOPort MuxedQCount 0 MuxQ-IDX (In)
11 14 IOPort MuxedQCount 1 MuxQ-A (In)
12 15 IOPort MuxedQCount 1 MuxQ-B (In)
13 16 IOPort MuxedQCount 1 MuxQ-IDX (In)
IO Connections for P1
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
1 17 IOPort SSerial 0 RXData2 (In)
14 18 IOPort SSerial 0 TXData2 (Out)
2 19 IOPort StepGen 7 Step/Table1 (Out)
15 20 IOPort StepGen 7 Dir/Table2 (Out)
3 21 IOPort StepGen 6 Step/Table1 (Out)
16 22 IOPort StepGen 6 Dir/Table2 (Out)
4 23 IOPort StepGen 5 Step/Table1 (Out)
17 24 IOPort StepGen 5 Dir/Table2 (Out)
5 25 IOPort StepGen 4 Step/Table1 (Out)
6 26 IOPort StepGen 4 Dir/Table2 (Out)
7 27 IOPort MuxedQCountSel 4 MuxSel0 (Out)
8 28 IOPort MuxedQCount 2 MuxQ-A (In)
9 29 IOPort MuxedQCount 2 MuxQ-B (In)
10 30 IOPort MuxedQCount 2 MuxQ-IDX (In)
11 31 IOPort MuxedQCount 3 MuxQ-A (In)
12 32 IOPort MuxedQCount 3 MuxQ-B (In)
13 33 IOPort MuxedQCount 3 MuxQ-IDX (In)
I'm a little confused how to configure a 5i25, since the 7i85S doesn't appear under the firmware list, and none of the options let me select 6 PWM generators and 3 encoders.
As an aside, is it a problem that the machine doesn't have any home/limit switches? With the Prototrak software, you manually moved the mill to a position and set that as home.
Last edit: 07 Jan 2016 22:13 by Jrjones.
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07 Jan 2016 22:35 - 07 Jan 2016 22:41 #68033
by PCW
Replied by PCW on topic Where to start with Mesa 7i92 + 7i85S
If you need 6 PWM generators, that is not the correct firmware
what is the motion interface to the prototrack hardware?
Edit, read back and see these are those funny 50% PWM = 0 drives
This is going to take 7I92_7I85spx2 firmware and a quite customized HAL file
to do the PWM offset. Pretty sure pncconf will not be any help at all here.
probably better to start with the hm2-servo example file
what is the motion interface to the prototrack hardware?
Edit, read back and see these are those funny 50% PWM = 0 drives
This is going to take 7I92_7I85spx2 firmware and a quite customized HAL file
to do the PWM offset. Pretty sure pncconf will not be any help at all here.
probably better to start with the hm2-servo example file
Last edit: 07 Jan 2016 22:41 by PCW.
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08 Jan 2016 00:23 - 08 Jan 2016 00:26 #68038
by Jrjones
Replied by Jrjones on topic Where to start with Mesa 7i92 + 7i85S
Yes, the drives need a 15.5 kHz differential PWM signal, so 2 PWM signals per drive.
Where can I find the 7I92_7I85spx2 firmware? I can't find it in the the support software zip on the Mesa website.
I'll start reading through the hm2-servo.hal example and see if I can get an idea of it.
Edit: Is this the correct firmware PCW? git.linuxcnc.org/gitweb?p=hostmot2-firmw...97adc0d8ccbd;hb=HEAD
Where can I find the 7I92_7I85spx2 firmware? I can't find it in the the support software zip on the Mesa website.
I'll start reading through the hm2-servo.hal example and see if I can get an idea of it.
Edit: Is this the correct firmware PCW? git.linuxcnc.org/gitweb?p=hostmot2-firmw...97adc0d8ccbd;hb=HEAD
Last edit: 08 Jan 2016 00:26 by Jrjones.
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08 Jan 2016 01:31 #68041
by PCW
Replied by PCW on topic Where to start with Mesa 7i92 + 7i85S
That's the correct pinout source file, but the firmware needs to be compiled,
using that file to define the pinout and included modules.
Note that that pinout file will work with 5I25 and the 7I92 but the firmware files
are card specific
The firmware files always end in .bit and mostly start with the card name
using that file to define the pinout and included modules.
Note that that pinout file will work with 5I25 and the 7I92 but the firmware files
are card specific
The firmware files always end in .bit and mostly start with the card name
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08 Jan 2016 10:35 #68054
by andypugh
Just to clarify where the confusion is, you have two PWM outputs per PWM module. So only 3 PWMs. Standard PWM has 2 pins per module two, PWM and direction. If you look at git.linuxcnc.org/gitweb?p=hostmot2-firmw...fe5a983ab494e0a49b49 you will see the subtle difference.
Going back a posting or two, you don't really need the config wizard to know about your daughter card in detail as firmware sets what pins exist in the sense of whether you see stepgens or pwms and encoders etc, but the HAL pins remain the same regardless of the physical pinouts on the cards. So, hm2_7i92.0.pwm.00.value will drive pins 2 and 15 in the DB25 on the 7i92 with the .bit file you are looking at, but might drive completely different physical pins with different bit file.
git.linuxcnc.org/gitweb?p=hostmot2-firmw...a263cff8d9c8;hb=HEAD
Defines the bitfiles that are created as part of the hostmot2-firmware package, which doesn't seem to include any 7i92 card definitions.
However, the 7i92.vhd etc do appear to exist in the hotmot2.zip file from Mesa. (which you will find inside 7i92,zip inside the Hostmot2/source folder)
I did have a Virtual Machine set up to create bitfiles, but I think I lost it to a HD failure, otherwise I would have offered to build you the bitfile.
The simplest solution is to ask PCW to build the bitfile for you, but it also seems that the LinuxCNC Hostmot2 repository needs updating to add the 7i92 and start autobuilding firmwares.
Replied by andypugh on topic Where to start with Mesa 7i92 + 7i85S
Yes, the drives need a 15.5 kHz differential PWM signal, so 2 PWM signals per drive.
Just to clarify where the confusion is, you have two PWM outputs per PWM module. So only 3 PWMs. Standard PWM has 2 pins per module two, PWM and direction. If you look at git.linuxcnc.org/gitweb?p=hostmot2-firmw...fe5a983ab494e0a49b49 you will see the subtle difference.
Going back a posting or two, you don't really need the config wizard to know about your daughter card in detail as firmware sets what pins exist in the sense of whether you see stepgens or pwms and encoders etc, but the HAL pins remain the same regardless of the physical pinouts on the cards. So, hm2_7i92.0.pwm.00.value will drive pins 2 and 15 in the DB25 on the 7i92 with the .bit file you are looking at, but might drive completely different physical pins with different bit file.
git.linuxcnc.org/gitweb?p=hostmot2-firmw...a263cff8d9c8;hb=HEAD
Defines the bitfiles that are created as part of the hostmot2-firmware package, which doesn't seem to include any 7i92 card definitions.
However, the 7i92.vhd etc do appear to exist in the hotmot2.zip file from Mesa. (which you will find inside 7i92,zip inside the Hostmot2/source folder)
I did have a Virtual Machine set up to create bitfiles, but I think I lost it to a HD failure, otherwise I would have offered to build you the bitfile.
The simplest solution is to ask PCW to build the bitfile for you, but it also seems that the LinuxCNC Hostmot2 repository needs updating to add the 7i92 and start autobuilding firmwares.
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08 Jan 2016 11:56 #68055
by cncbasher
Replied by cncbasher on topic Where to start with Mesa 7i92 + 7i85S
heres the 7i92_7i85spx2 bit file
i dont yet have a 7i92 to test so it's just as built .
i dont yet have a 7i92 to test so it's just as built .
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08 Jan 2016 16:48 #68070
by PCW
Replied by PCW on topic Where to start with Mesa 7i92 + 7i85S
I would recommend a bit of caution with the 7I92 and untested bitfiles as its easy to brick a 7I92 with a
physically correct (correct CRC correct chip etc) but non functional bit file
I would do this with an unknown bitfile:
mesaflash --device 7i92 --write newbitfile.bit --fallback
mesaflash --device 7i92 --reload --fallback
This will write the new bit file to the fallback area of the flash memory and then load the FPGA from that area
if the 7I92 fails to communicate after this, a power cycle will reload the user configuration
physically correct (correct CRC correct chip etc) but non functional bit file
I would do this with an unknown bitfile:
mesaflash --device 7i92 --write newbitfile.bit --fallback
mesaflash --device 7i92 --reload --fallback
This will write the new bit file to the fallback area of the flash memory and then load the FPGA from that area
if the 7I92 fails to communicate after this, a power cycle will reload the user configuration
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08 Jan 2016 19:03 #68074
by Jrjones
Replied by Jrjones on topic Where to start with Mesa 7i92 + 7i85S
Thanks for the bit file cncbasher.
It appears to have loaded correctly, I did load it into the fallback area as PCW suggested in case it didn't work.
So I should be to configure the Dir pin as a second (inverted) complement to the primary PWM pin?
It appears to have loaded correctly, I did load it into the fallback area as PCW suggested in case it didn't work.
Configuration Name: HOSTMOT2
General configuration information:
BoardName : MESA7I92
FPGA Size: 9 KGates
FPGA Pins: 144
Number of IO Ports: 2
Width of one I/O port: 17
Clock Low frequency: 100.0000 MHz
Clock High frequency: 200.0000 MHz
IDROM Type: 3
Instance Stride 0: 4
Instance Stride 1: 64
Register Stride 0: 256
Register Stride 1: 256
Modules in configuration:
Module: WatchDog
There are 1 of WatchDog in configuration
Version: 0
Registers: 3
BaseAddress: 0C00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: IOPort
There are 2 of IOPort in configuration
Version: 0
Registers: 5
BaseAddress: 1000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: MuxedQCount
There are 8 of MuxedQCount in configuration
Version: 3
Registers: 5
BaseAddress: 3600
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: MuxedQCountSel
There are 1 of MuxedQCountSel in configuration
Version: 0
Registers: 0
BaseAddress: 0000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: SSerial
There are 1 of SSerial in configuration
Version: 0
Registers: 6
BaseAddress: 5B00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 64 bytes
Module: PWM
There are 8 of PWM in configuration
Version: 0
Registers: 5
BaseAddress: 4100
ClockFrequency: 200.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Module: LED
There are 1 of LED in configuration
Version: 0
Registers: 1
BaseAddress: 0200
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes
Configuration pin-out:
IO Connections for P2
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
1 0 IOPort SSerial 0 RXData1 (In)
14 1 IOPort SSerial 0 TXData1 (Out)
2 2 IOPort PWM 3 PWM (Out)
15 3 IOPort PWM 3 Dir (Out)
3 4 IOPort PWM 2 PWM (Out)
16 5 IOPort PWM 2 Dir (Out)
4 6 IOPort PWM 1 PWM (Out)
17 7 IOPort PWM 1 Dir (Out)
5 8 IOPort PWM 0 PWM (Out)
6 9 IOPort PWM 0 Dir (Out)
7 10 IOPort MuxedQCountSel 0 MuxSel0 (Out)
8 11 IOPort MuxedQCount 0 MuxQ-A (In)
9 12 IOPort MuxedQCount 0 MuxQ-B (In)
10 13 IOPort MuxedQCount 0 MuxQ-IDX (In)
11 14 IOPort MuxedQCount 1 MuxQ-A (In)
12 15 IOPort MuxedQCount 1 MuxQ-B (In)
13 16 IOPort MuxedQCount 1 MuxQ-IDX (In)
IO Connections for P1
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
1 17 IOPort SSerial 0 RXData2 (In)
14 18 IOPort SSerial 0 TXData2 (Out)
2 19 IOPort PWM 7 PWM (Out)
15 20 IOPort PWM 7 Dir (Out)
3 21 IOPort PWM 6 PWM (Out)
16 22 IOPort PWM 6 Dir (Out)
4 23 IOPort PWM 5 PWM (Out)
17 24 IOPort PWM 5 Dir (Out)
5 25 IOPort PWM 4 PWM (Out)
6 26 IOPort PWM 4 Dir (Out)
7 27 IOPort MuxedQCountSel 4 MuxSel0 (Out)
8 28 IOPort MuxedQCount 2 MuxQ-A (In)
9 29 IOPort MuxedQCount 2 MuxQ-B (In)
10 30 IOPort MuxedQCount 2 MuxQ-IDX (In)
11 31 IOPort MuxedQCount 3 MuxQ-A (In)
12 32 IOPort MuxedQCount 3 MuxQ-B (In)
13 33 IOPort MuxedQCount 3 MuxQ-IDX (In)So I should be to configure the Dir pin as a second (inverted) complement to the primary PWM pin?
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08 Jan 2016 19:17 #68076
by andypugh
Is that what you need?
The 7i85S outputs are in differential pairs, TX0 and /TX0 for example.
The potential output configs for the PWM are here:
linuxcnc.org/docs/2.7/html/man/man9/hostmot2.9.html#pwmgen
But it is possible that the bitfile you have has a special pwmgen.
Replied by andypugh on topic Where to start with Mesa 7i92 + 7i85S
So I should be to configure the Dir pin as a second (inverted) complement to the primary PWM pin?
Is that what you need?
The 7i85S outputs are in differential pairs, TX0 and /TX0 for example.
The potential output configs for the PWM are here:
linuxcnc.org/docs/2.7/html/man/man9/hostmot2.9.html#pwmgen
But it is possible that the bitfile you have has a special pwmgen.
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