PnCConf with MESA 5i25 + 7i76 + 7i85

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16 Dec 2018 15:30 #122476 by PCW
The command to write new firmware would be:

sudo mesaflash --device 5i25 --write 5i25_7i76_7i85s.bit

You can run

mesaflash --help

to get a list of mesaflash commands

If the current firmware does not support --reload, you must power cycle the host PC to load the newly written firmware

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05 Mar 2019 05:38 #127753 by Peter
Hi Jan and all.

Did you get anywhere with your scales?
I've got the same cards and am about to get the scales going.
Do you or anyone have code relevant to encoders on a 7i85?

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05 Mar 2019 11:44 #127778 by pl7i92
you may first see if pins are present by
sudo dmesg -c {You will be asked for a password}
halrun
loadrt hostmot2
loadrt hm2_pci
show pin
show param
exit
dmesg

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05 Mar 2019 17:13 - 05 Mar 2019 17:24 #127804 by Peter
HI Yes it all seems to be there
THANKS!
Whats next?
-Peter
halcmd: show pin
Component Pins:
Owner   Type  Dir         Value  Name
     5  u32   IN     0x00000000  hm2_5i25.0.7i73.0.1.display
     5  s32   OUT             0  hm2_5i25.0.7i73.0.1.enc0.count
     5  bit   I/O         FALSE  hm2_5i25.0.7i73.0.1.enc0.index-enable
     5  float OUT             0  hm2_5i25.0.7i73.0.1.enc0.position
     5  s32   OUT             0  hm2_5i25.0.7i73.0.1.enc0.rawcounts
     5  bit   I/O         FALSE  hm2_5i25.0.7i73.0.1.enc0.reset
     5  s32   OUT             0  hm2_5i25.0.7i73.0.1.enc1.count
     5  bit   I/O         FALSE  hm2_5i25.0.7i73.0.1.enc1.index-enable
     5  float OUT             0  hm2_5i25.0.7i73.0.1.enc1.position
     5  s32   OUT             0  hm2_5i25.0.7i73.0.1.enc1.rawcounts
     5  bit   I/O         FALSE  hm2_5i25.0.7i73.0.1.enc1.reset
     5  s32   OUT             0  hm2_5i25.0.7i73.0.1.enc2.count
     5  bit   I/O         FALSE  hm2_5i25.0.7i73.0.1.enc2.index-enable
     5  float OUT             0  hm2_5i25.0.7i73.0.1.enc2.position
     5  s32   OUT             0  hm2_5i25.0.7i73.0.1.enc2.rawcounts
     5  bit   I/O         FALSE  hm2_5i25.0.7i73.0.1.enc2.reset
     5  s32   OUT             0  hm2_5i25.0.7i73.0.1.enc3.count
     5  bit   I/O         FALSE  hm2_5i25.0.7i73.0.1.enc3.index-enable
     5  float OUT             0  hm2_5i25.0.7i73.0.1.enc3.position
     5  s32   OUT             0  hm2_5i25.0.7i73.0.1.enc3.rawcounts
     5  bit   I/O         FALSE  hm2_5i25.0.7i73.0.1.enc3.reset
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-00
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-00-not
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-01
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-01-not
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-02
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-02-not
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-03
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-03-not
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-04
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-04-not
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-05
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-05-not
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-06
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-06-not
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-07
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-07-not
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-08
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-08-not
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-09
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-09-not
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-10
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-10-not
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-11
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-11-not
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-12
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-12-not
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-13
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-13-not
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-14
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-14-not
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-15
     5  bit   OUT         FALSE  hm2_5i25.0.7i73.0.1.input-15-not
     5  u32   OUT    0x00000000  hm2_5i25.0.7i73.0.1.keycode
     5  bit   IN          FALSE  hm2_5i25.0.7i73.0.1.output-00
     5  bit   IN          FALSE  hm2_5i25.0.7i73.0.1.output-01
     5  bit   IN          FALSE  hm2_5i25.0.7i73.0.1.output-02
     5  bit   IN          FALSE  hm2_5i25.0.7i73.0.1.output-03
     5  bit   IN          FALSE  hm2_5i25.0.7i73.0.1.output-04
     5  bit   IN          FALSE  hm2_5i25.0.7i73.0.1.output-05
     5  bit   IN          FALSE  hm2_5i25.0.7i73.0.1.output-06
     5  bit   IN          FALSE  hm2_5i25.0.7i73.0.1.output-07
     5  bit   IN          FALSE  hm2_5i25.0.7i73.0.1.output-08
     5  bit   IN          FALSE  hm2_5i25.0.7i73.0.1.output-09
     5  s32   OUT             0  hm2_5i25.0.encoder.00.count
     5  s32   OUT             0  hm2_5i25.0.encoder.00.count-latched
     5  bit   I/O         FALSE  hm2_5i25.0.encoder.00.index-enable
     5  bit   OUT         FALSE  hm2_5i25.0.encoder.00.input-a
     5  bit   OUT         FALSE  hm2_5i25.0.encoder.00.input-b
     5  bit   OUT          TRUE  hm2_5i25.0.encoder.00.input-index
     5  bit   IN          FALSE  hm2_5i25.0.encoder.00.latch-enable
     5  bit   IN          FALSE  hm2_5i25.0.encoder.00.latch-polarity
     5  float OUT             0  hm2_5i25.0.encoder.00.position
     5  float OUT             0  hm2_5i25.0.encoder.00.position-latched
     5  bit   OUT         FALSE  hm2_5i25.0.encoder.00.quad-error
     5  bit   IN          FALSE  hm2_5i25.0.encoder.00.quad-error-enable
     5  s32   OUT             0  hm2_5i25.0.encoder.00.rawcounts
     5  s32   OUT             0  hm2_5i25.0.encoder.00.rawlatch
     5  bit   IN          FALSE  hm2_5i25.0.encoder.00.reset
     5  float OUT             0  hm2_5i25.0.encoder.00.velocity
     5  s32   OUT             0  hm2_5i25.0.encoder.01.count
     5  s32   OUT             0  hm2_5i25.0.encoder.01.count-latched
     5  bit   I/O         FALSE  hm2_5i25.0.encoder.01.index-enable
     5  bit   OUT         FALSE  hm2_5i25.0.encoder.01.input-a
     5  bit   OUT         FALSE  hm2_5i25.0.encoder.01.input-b
     5  bit   OUT          TRUE  hm2_5i25.0.encoder.01.input-index
     5  bit   IN          FALSE  hm2_5i25.0.encoder.01.latch-enable
     5  bit   IN          FALSE  hm2_5i25.0.encoder.01.latch-polarity
     5  float OUT             0  hm2_5i25.0.encoder.01.position
     5  float OUT             0  hm2_5i25.0.encoder.01.position-latched
     5  bit   OUT         FALSE  hm2_5i25.0.encoder.01.quad-error
     5  bit   IN          FALSE  hm2_5i25.0.encoder.01.quad-error-enable
     5  s32   OUT             0  hm2_5i25.0.encoder.01.rawcounts
     5  s32   OUT             0  hm2_5i25.0.encoder.01.rawlatch
     5  bit   IN          FALSE  hm2_5i25.0.encoder.01.reset
     5  float OUT             0  hm2_5i25.0.encoder.01.velocity
     5  s32   OUT             0  hm2_5i25.0.encoder.02.count
     5  s32   OUT             0  hm2_5i25.0.encoder.02.count-latched
     5  bit   I/O         FALSE  hm2_5i25.0.encoder.02.index-enable
     5  bit   OUT         FALSE  hm2_5i25.0.encoder.02.input-a
     5  bit   OUT          TRUE  hm2_5i25.0.encoder.02.input-b
     5  bit   OUT         FALSE  hm2_5i25.0.encoder.02.input-index
     5  bit   IN          FALSE  hm2_5i25.0.encoder.02.latch-enable
     5  bit   IN          FALSE  hm2_5i25.0.encoder.02.latch-polarity
     5  float OUT             0  hm2_5i25.0.encoder.02.position
     5  float OUT             0  hm2_5i25.0.encoder.02.position-latched
     5  bit   OUT         FALSE  hm2_5i25.0.encoder.02.quad-error
     5  bit   IN          FALSE  hm2_5i25.0.encoder.02.quad-error-enable
     5  s32   OUT             1  hm2_5i25.0.encoder.02.rawcounts
     5  s32   OUT             1  hm2_5i25.0.encoder.02.rawlatch
     5  bit   IN          FALSE  hm2_5i25.0.encoder.02.reset
     5  float OUT             0  hm2_5i25.0.encoder.02.velocity
     5  s32   OUT             0  hm2_5i25.0.encoder.03.count
     5  s32   OUT             0  hm2_5i25.0.encoder.03.count-latched
     5  bit   I/O         FALSE  hm2_5i25.0.encoder.03.index-enable
     5  bit   OUT          TRUE  hm2_5i25.0.encoder.03.input-a
     5  bit   OUT         FALSE  hm2_5i25.0.encoder.03.input-b
     5  bit   OUT          TRUE  hm2_5i25.0.encoder.03.input-index
     5  bit   IN          FALSE  hm2_5i25.0.encoder.03.latch-enable
     5  bit   IN          FALSE  hm2_5i25.0.encoder.03.latch-polarity
     5  float OUT             0  hm2_5i25.0.encoder.03.position
     5  float OUT             0  hm2_5i25.0.encoder.03.position-latched
     5  bit   OUT         FALSE  hm2_5i25.0.encoder.03.quad-error
     5  bit   IN          FALSE  hm2_5i25.0.encoder.03.quad-error-enable
     5  s32   OUT             1  hm2_5i25.0.encoder.03.rawcounts
     5  s32   OUT             1  hm2_5i25.0.encoder.03.rawlatch
     5  bit   IN          FALSE  hm2_5i25.0.encoder.03.reset
     5  float OUT             0  hm2_5i25.0.encoder.03.velocity
     5  s32   OUT             0  hm2_5i25.0.encoder.04.count
     5  s32   OUT             0  hm2_5i25.0.encoder.04.count-latched
     5  bit   I/O         FALSE  hm2_5i25.0.encoder.04.index-enable
     5  bit   OUT          TRUE  hm2_5i25.0.encoder.04.input-a
     5  bit   OUT          TRUE  hm2_5i25.0.encoder.04.input-b
     5  bit   OUT          TRUE  hm2_5i25.0.encoder.04.input-index
     5  bit   IN          FALSE  hm2_5i25.0.encoder.04.latch-enable
     5  bit   IN          FALSE  hm2_5i25.0.encoder.04.latch-polarity
     5  float OUT             0  hm2_5i25.0.encoder.04.position
     5  float OUT             0  hm2_5i25.0.encoder.04.position-latched
     5  bit   OUT         FALSE  hm2_5i25.0.encoder.04.quad-error
     5  bit   IN          FALSE  hm2_5i25.0.encoder.04.quad-error-enable
     5  s32   OUT             0  hm2_5i25.0.encoder.04.rawcounts
     5  s32   OUT             0  hm2_5i25.0.encoder.04.rawlatch
     5  bit   IN          FALSE  hm2_5i25.0.encoder.04.reset
     5  float OUT             0  hm2_5i25.0.encoder.04.velocity
     5  s32   OUT             0  hm2_5i25.0.encoder.05.count
     5  s32   OUT             0  hm2_5i25.0.encoder.05.count-latched
     5  bit   I/O         FALSE  hm2_5i25.0.encoder.05.index-enable
     5  bit   OUT         FALSE  hm2_5i25.0.encoder.05.input-a
     5  bit   OUT         FALSE  hm2_5i25.0.encoder.05.input-b
     5  bit   OUT          TRUE  hm2_5i25.0.encoder.05.input-index
     5  bit   IN          FALSE  hm2_5i25.0.encoder.05.latch-enable
     5  bit   IN          FALSE  hm2_5i25.0.encoder.05.latch-polarity
     5  float OUT             0  hm2_5i25.0.encoder.05.position
     5  float OUT             0  hm2_5i25.0.encoder.05.position-latched
     5  bit   OUT         FALSE  hm2_5i25.0.encoder.05.quad-error
     5  bit   IN          FALSE  hm2_5i25.0.encoder.05.quad-error-enable
     5  s32   OUT             0  hm2_5i25.0.encoder.05.rawcounts
     5  s32   OUT             0  hm2_5i25.0.encoder.05.rawlatch
     5  bit   IN          FALSE  hm2_5i25.0.encoder.05.reset
     5  float OUT             0  hm2_5i25.0.encoder.05.velocity
     5  u32   IN     0x007F2815  hm2_5i25.0.encoder.muxed-sample-frequency
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.000.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.000.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.001.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.001.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.002.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.002.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.003.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.003.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.004.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.004.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.005.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.005.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.006.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.006.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.007.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.007.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.008.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.008.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.009.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.009.in_not
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.010.in
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.010.in_not
     5  bit   IN          FALSE  hm2_5i25.0.gpio.010.out
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.011.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.011.in_not
     5  bit   IN          FALSE  hm2_5i25.0.gpio.011.out
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.012.in
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.012.in_not
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.013.in
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.013.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.014.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.014.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.015.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.015.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.016.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.016.in_not
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.017.in
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.017.in_not
     5  bit   IN          FALSE  hm2_5i25.0.gpio.017.out
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.018.in
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.018.in_not
     5  bit   IN          FALSE  hm2_5i25.0.gpio.018.out
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.019.in
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.019.in_not
     5  bit   IN          FALSE  hm2_5i25.0.gpio.019.out
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.020.in
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.020.in_not
     5  bit   IN          FALSE  hm2_5i25.0.gpio.020.out
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.021.in
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.021.in_not
     5  bit   IN          FALSE  hm2_5i25.0.gpio.021.out
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.022.in
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.022.in_not
     5  bit   IN          FALSE  hm2_5i25.0.gpio.022.out
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.023.in
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.023.in_not
     5  bit   IN          FALSE  hm2_5i25.0.gpio.023.out
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.024.in
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.024.in_not
     5  bit   IN          FALSE  hm2_5i25.0.gpio.024.out
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.025.in
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.025.in_not
     5  bit   IN          FALSE  hm2_5i25.0.gpio.025.out
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.026.in
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.026.in_not
     5  bit   IN          FALSE  hm2_5i25.0.gpio.026.out
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.027.in
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.027.in_not
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.028.in
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.028.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.029.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.029.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.030.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.030.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.031.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.031.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.032.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.032.in_not
     5  bit   OUT         FALSE  hm2_5i25.0.gpio.033.in
     5  bit   OUT          TRUE  hm2_5i25.0.gpio.033.in_not
     5  bit   IN          FALSE  hm2_5i25.0.led.CR01
     5  bit   IN          FALSE  hm2_5i25.0.led.CR02
     5  s32   OUT             0  hm2_5i25.0.read.time
     5  s32   OUT             0  hm2_5i25.0.read_gpio.time
     5  u32   OUT    0x00000000  hm2_5i25.0.sserial.port-0.fault-count
     5  u32   OUT    0x00000000  hm2_5i25.0.sserial.port-0.port_state
     5  bit   IN           TRUE  hm2_5i25.0.sserial.port-0.run
     5  bit   IN          FALSE  hm2_5i25.0.stepgen.00.control-type
     5  s32   OUT             0  hm2_5i25.0.stepgen.00.counts
     5  float OUT             0  hm2_5i25.0.stepgen.00.dbg_err_at_match
     5  float OUT             0  hm2_5i25.0.stepgen.00.dbg_ff_vel
     5  float OUT             0  hm2_5i25.0.stepgen.00.dbg_pos_minus_prev_cmd
     5  float OUT             0  hm2_5i25.0.stepgen.00.dbg_s_to_match
     5  s32   OUT             0  hm2_5i25.0.stepgen.00.dbg_step_rate
     5  float OUT             0  hm2_5i25.0.stepgen.00.dbg_vel_error
     5  bit   IN          FALSE  hm2_5i25.0.stepgen.00.enable
     5  float IN              0  hm2_5i25.0.stepgen.00.position-cmd
     5  float OUT             0  hm2_5i25.0.stepgen.00.position-fb
     5  float IN              0  hm2_5i25.0.stepgen.00.velocity-cmd
     5  float OUT             0  hm2_5i25.0.stepgen.00.velocity-fb
     5  bit   IN          FALSE  hm2_5i25.0.stepgen.01.control-type
     5  s32   OUT             0  hm2_5i25.0.stepgen.01.counts
     5  float OUT             0  hm2_5i25.0.stepgen.01.dbg_err_at_match
     5  float OUT             0  hm2_5i25.0.stepgen.01.dbg_ff_vel
     5  float OUT             0  hm2_5i25.0.stepgen.01.dbg_pos_minus_prev_cmd
     5  float OUT             0  hm2_5i25.0.stepgen.01.dbg_s_to_match
     5  s32   OUT             0  hm2_5i25.0.stepgen.01.dbg_step_rate
     5  float OUT             0  hm2_5i25.0.stepgen.01.dbg_vel_error
     5  bit   IN          FALSE  hm2_5i25.0.stepgen.01.enable
     5  float IN              0  hm2_5i25.0.stepgen.01.position-cmd
     5  float OUT             0  hm2_5i25.0.stepgen.01.position-fb
     5  float IN              0  hm2_5i25.0.stepgen.01.velocity-cmd
     5  float OUT             0  hm2_5i25.0.stepgen.01.velocity-fb
     5  bit   IN          FALSE  hm2_5i25.0.stepgen.02.control-type
     5  s32   OUT             0  hm2_5i25.0.stepgen.02.counts
     5  float OUT             0  hm2_5i25.0.stepgen.02.dbg_err_at_match
     5  float OUT             0  hm2_5i25.0.stepgen.02.dbg_ff_vel
     5  float OUT             0  hm2_5i25.0.stepgen.02.dbg_pos_minus_prev_cmd
     5  float OUT             0  hm2_5i25.0.stepgen.02.dbg_s_to_match
     5  s32   OUT             0  hm2_5i25.0.stepgen.02.dbg_step_rate
     5  float OUT             0  hm2_5i25.0.stepgen.02.dbg_vel_error
     5  bit   IN          FALSE  hm2_5i25.0.stepgen.02.enable
     5  float IN              0  hm2_5i25.0.stepgen.02.position-cmd
     5  float OUT             0  hm2_5i25.0.stepgen.02.position-fb
     5  float IN              0  hm2_5i25.0.stepgen.02.velocity-cmd
     5  float OUT             0  hm2_5i25.0.stepgen.02.velocity-fb
     5  bit   IN          FALSE  hm2_5i25.0.stepgen.03.control-type
     5  s32   OUT             0  hm2_5i25.0.stepgen.03.counts
     5  float OUT             0  hm2_5i25.0.stepgen.03.dbg_err_at_match
     5  float OUT             0  hm2_5i25.0.stepgen.03.dbg_ff_vel
     5  float OUT             0  hm2_5i25.0.stepgen.03.dbg_pos_minus_prev_cmd
     5  float OUT             0  hm2_5i25.0.stepgen.03.dbg_s_to_match
     5  s32   OUT             0  hm2_5i25.0.stepgen.03.dbg_step_rate
     5  float OUT             0  hm2_5i25.0.stepgen.03.dbg_vel_error
     5  bit   IN          FALSE  hm2_5i25.0.stepgen.03.enable
     5  float IN              0  hm2_5i25.0.stepgen.03.position-cmd
     5  float OUT             0  hm2_5i25.0.stepgen.03.position-fb
     5  float IN              0  hm2_5i25.0.stepgen.03.velocity-cmd
     5  float OUT             0  hm2_5i25.0.stepgen.03.velocity-fb
     5  bit   IN          FALSE  hm2_5i25.0.stepgen.04.control-type
     5  s32   OUT             0  hm2_5i25.0.stepgen.04.counts
     5  float OUT             0  hm2_5i25.0.stepgen.04.dbg_err_at_match
     5  float OUT             0  hm2_5i25.0.stepgen.04.dbg_ff_vel
     5  float OUT             0  hm2_5i25.0.stepgen.04.dbg_pos_minus_prev_cmd
     5  float OUT             0  hm2_5i25.0.stepgen.04.dbg_s_to_match
     5  s32   OUT             0  hm2_5i25.0.stepgen.04.dbg_step_rate
     5  float OUT             0  hm2_5i25.0.stepgen.04.dbg_vel_error
     5  bit   IN          FALSE  hm2_5i25.0.stepgen.04.enable
     5  float IN              0  hm2_5i25.0.stepgen.04.position-cmd
     5  float OUT             0  hm2_5i25.0.stepgen.04.position-fb
     5  float IN              0  hm2_5i25.0.stepgen.04.velocity-cmd
     5  float OUT             0  hm2_5i25.0.stepgen.04.velocity-fb
     5  bit   I/O         FALSE  hm2_5i25.0.watchdog.has_bit
     5  s32   OUT             0  hm2_5i25.0.write.time
     5  s32   OUT             0  hm2_5i25.0.write_gpio.time

halcmd: show param
Parameters:
Owner   Type  Dir         Value  Name
     5  u32   RW     0x00000100  hm2_5i25.0.7i73.0.1.enc0.counts-per-rev
     5  float RW              1  hm2_5i25.0.7i73.0.1.enc0.scale
     5  u32   RW     0x00000100  hm2_5i25.0.7i73.0.1.enc1.counts-per-rev
     5  float RW              1  hm2_5i25.0.7i73.0.1.enc1.scale
     5  u32   RW     0x00000100  hm2_5i25.0.7i73.0.1.enc2.counts-per-rev
     5  float RW              1  hm2_5i25.0.7i73.0.1.enc2.scale
     5  u32   RW     0x00000100  hm2_5i25.0.7i73.0.1.enc3.counts-per-rev
     5  float RW              1  hm2_5i25.0.7i73.0.1.enc3.scale
     5  u32   RO     0x00008000  hm2_5i25.0.7i73.0.1.nvanalogfilter
     5  u32   RO     0x00000009  hm2_5i25.0.7i73.0.1.nvbaudrate
     5  u32   RO     0x00002710  hm2_5i25.0.7i73.0.1.nvcontrast
     5  u32   RO     0x00000414  hm2_5i25.0.7i73.0.1.nvdispmode
     5  u32   RO     0x00000000  hm2_5i25.0.7i73.0.1.nvencmode0
     5  u32   RO     0x00000000  hm2_5i25.0.7i73.0.1.nvencmode1
     5  u32   RO     0x00000000  hm2_5i25.0.7i73.0.1.nvencmode2
     5  u32   RO     0x00000000  hm2_5i25.0.7i73.0.1.nvencmode3
     5  u32   RO     0x0000001E  hm2_5i25.0.7i73.0.1.nvkeytimer
     5  u32   RO     0x1300011C  hm2_5i25.0.7i73.0.1.nvunitnumber
     5  u32   RO     0x00000032  hm2_5i25.0.7i73.0.1.nvwatchdogtimeout
     5  bit   RW          FALSE  hm2_5i25.0.7i73.0.1.output-00-invert
     5  bit   RW          FALSE  hm2_5i25.0.7i73.0.1.output-01-invert
     5  bit   RW          FALSE  hm2_5i25.0.7i73.0.1.output-02-invert
     5  bit   RW          FALSE  hm2_5i25.0.7i73.0.1.output-03-invert
     5  bit   RW          FALSE  hm2_5i25.0.7i73.0.1.output-04-invert
     5  bit   RW          FALSE  hm2_5i25.0.7i73.0.1.output-05-invert
     5  bit   RW          FALSE  hm2_5i25.0.7i73.0.1.output-06-invert
     5  bit   RW          FALSE  hm2_5i25.0.7i73.0.1.output-07-invert
     5  bit   RW          FALSE  hm2_5i25.0.7i73.0.1.output-08-invert
     5  bit   RW          FALSE  hm2_5i25.0.7i73.0.1.output-09-invert
     5  u32   RO     0x0000000E  hm2_5i25.0.7i73.0.1.swrevision
     5  bit   RW          FALSE  hm2_5i25.0.encoder.00.counter-mode
     5  bit   RW           TRUE  hm2_5i25.0.encoder.00.filter
     5  bit   RW          FALSE  hm2_5i25.0.encoder.00.index-invert
     5  bit   RW          FALSE  hm2_5i25.0.encoder.00.index-mask
     5  bit   RW          FALSE  hm2_5i25.0.encoder.00.index-mask-invert
     5  float RW              1  hm2_5i25.0.encoder.00.scale
     5  float RW            0.5  hm2_5i25.0.encoder.00.vel-timeout
     5  bit   RW          FALSE  hm2_5i25.0.encoder.01.counter-mode
     5  bit   RW           TRUE  hm2_5i25.0.encoder.01.filter
     5  bit   RW          FALSE  hm2_5i25.0.encoder.01.index-invert
     5  bit   RW          FALSE  hm2_5i25.0.encoder.01.index-mask
     5  bit   RW          FALSE  hm2_5i25.0.encoder.01.index-mask-invert
     5  float RW              1  hm2_5i25.0.encoder.01.scale
     5  float RW            0.5  hm2_5i25.0.encoder.01.vel-timeout
     5  bit   RW          FALSE  hm2_5i25.0.encoder.02.counter-mode
     5  bit   RW           TRUE  hm2_5i25.0.encoder.02.filter
     5  bit   RW          FALSE  hm2_5i25.0.encoder.02.index-invert
     5  bit   RW          FALSE  hm2_5i25.0.encoder.02.index-mask
     5  bit   RW          FALSE  hm2_5i25.0.encoder.02.index-mask-invert
     5  float RW              1  hm2_5i25.0.encoder.02.scale
     5  float RW            0.5  hm2_5i25.0.encoder.02.vel-timeout
     5  bit   RW          FALSE  hm2_5i25.0.encoder.03.counter-mode
     5  bit   RW           TRUE  hm2_5i25.0.encoder.03.filter
     5  bit   RW          FALSE  hm2_5i25.0.encoder.03.index-invert
     5  bit   RW          FALSE  hm2_5i25.0.encoder.03.index-mask
     5  bit   RW          FALSE  hm2_5i25.0.encoder.03.index-mask-invert
     5  float RW              1  hm2_5i25.0.encoder.03.scale
     5  float RW            0.5  hm2_5i25.0.encoder.03.vel-timeout
     5  bit   RW          FALSE  hm2_5i25.0.encoder.04.counter-mode
     5  bit   RW           TRUE  hm2_5i25.0.encoder.04.filter
     5  bit   RW          FALSE  hm2_5i25.0.encoder.04.index-invert
     5  bit   RW          FALSE  hm2_5i25.0.encoder.04.index-mask
     5  bit   RW          FALSE  hm2_5i25.0.encoder.04.index-mask-invert
     5  float RW              1  hm2_5i25.0.encoder.04.scale
     5  float RW            0.5  hm2_5i25.0.encoder.04.vel-timeout
     5  bit   RW          FALSE  hm2_5i25.0.encoder.05.counter-mode
     5  bit   RW           TRUE  hm2_5i25.0.encoder.05.filter
     5  bit   RW          FALSE  hm2_5i25.0.encoder.05.index-invert
     5  bit   RW          FALSE  hm2_5i25.0.encoder.05.index-mask
     5  bit   RW          FALSE  hm2_5i25.0.encoder.05.index-mask-invert
     5  float RW              1  hm2_5i25.0.encoder.05.scale
     5  float RW            0.5  hm2_5i25.0.encoder.05.vel-timeout
     5  bit   RW          FALSE  hm2_5i25.0.gpio.000.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.000.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.001.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.001.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.002.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.002.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.003.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.003.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.004.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.004.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.005.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.005.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.006.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.006.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.007.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.007.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.008.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.008.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.009.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.009.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.010.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.010.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.010.is_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.011.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.011.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.011.is_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.012.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.012.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.017.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.017.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.017.is_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.018.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.018.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.018.is_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.019.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.019.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.019.is_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.020.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.020.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.020.is_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.021.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.021.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.021.is_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.022.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.022.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.022.is_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.023.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.023.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.023.is_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.024.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.024.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.024.is_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.025.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.025.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.025.is_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.026.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.026.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.gpio.026.is_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.027.invert_output
     5  bit   RW          FALSE  hm2_5i25.0.gpio.027.is_opendrain
     5  bit   RW          FALSE  hm2_5i25.0.io_error
     5  s32   RW              0  hm2_5i25.0.read.tmax
     5  bit   RO          FALSE  hm2_5i25.0.read.tmax-increased
     5  s32   RW              0  hm2_5i25.0.read_gpio.tmax
     5  bit   RO          FALSE  hm2_5i25.0.read_gpio.tmax-increased
     5  u32   RW     0x00000001  hm2_5i25.0.sserial.port-0.fault-dec
     5  u32   RW     0x0000000A  hm2_5i25.0.sserial.port-0.fault-inc
     5  u32   RW     0x000000C8  hm2_5i25.0.sserial.port-0.fault-lim
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.00.dirhold
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.00.dirsetup
     5  float RW              1  hm2_5i25.0.stepgen.00.maxaccel
     5  float RW              0  hm2_5i25.0.stepgen.00.maxvel
     5  float RW              1  hm2_5i25.0.stepgen.00.position-scale
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.00.step_type
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.00.steplen
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.00.stepspace
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.00.table-data-0
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.00.table-data-1
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.00.table-data-2
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.00.table-data-3
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.01.dirhold
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.01.dirsetup
     5  float RW              1  hm2_5i25.0.stepgen.01.maxaccel
     5  float RW              0  hm2_5i25.0.stepgen.01.maxvel
     5  float RW              1  hm2_5i25.0.stepgen.01.position-scale
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.01.step_type
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.01.steplen
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.01.stepspace
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.01.table-data-0
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.01.table-data-1
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.01.table-data-2
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.01.table-data-3
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.02.dirhold
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.02.dirsetup
     5  float RW              1  hm2_5i25.0.stepgen.02.maxaccel
     5  float RW              0  hm2_5i25.0.stepgen.02.maxvel
     5  float RW              1  hm2_5i25.0.stepgen.02.position-scale
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.02.step_type
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.02.steplen
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.02.stepspace
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.02.table-data-0
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.02.table-data-1
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.02.table-data-2
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.02.table-data-3
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.03.dirhold
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.03.dirsetup
     5  float RW              1  hm2_5i25.0.stepgen.03.maxaccel
     5  float RW              0  hm2_5i25.0.stepgen.03.maxvel
     5  float RW              1  hm2_5i25.0.stepgen.03.position-scale
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.03.step_type
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.03.steplen
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.03.stepspace
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.03.table-data-0
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.03.table-data-1
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.03.table-data-2
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.03.table-data-3
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.04.dirhold
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.04.dirsetup
     5  float RW              1  hm2_5i25.0.stepgen.04.maxaccel
     5  float RW              0  hm2_5i25.0.stepgen.04.maxvel
     5  float RW              1  hm2_5i25.0.stepgen.04.position-scale
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.04.step_type
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.04.steplen
     5  u32   RW     0x00077FE2  hm2_5i25.0.stepgen.04.stepspace
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.04.table-data-0
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.04.table-data-1
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.04.table-data-2
     5  u32   RW     0x00000000  hm2_5i25.0.stepgen.04.table-data-3
     5  u32   RW     0x004C4B40  hm2_5i25.0.watchdog.timeout_ns
     5  s32   RW              0  hm2_5i25.0.write.tmax
     5  bit   RO          FALSE  hm2_5i25.0.write.tmax-increased
     5  s32   RW              0  hm2_5i25.0.write_gpio.tmax
     5  bit   RO          FALSE  hm2_5i25.0.write_gpio.tmax-increased

halcmd: 
Last edit: 05 Mar 2019 17:24 by andypugh.

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05 Mar 2019 17:18 - 06 Mar 2019 13:33 #127807 by Peter
heres the output from dmesg
cnc@CNCMILL:~$ dmesg
[  265.087381] I-pipe: head domain RTAI registered.
[  265.087387] RTAI[hal]: compiled with gcc version 4.7.2 (Debian 4.7.2-5) .
[  265.087426] RTAI[hal]: mounted (IPIPE-NOTHREADS, IMMEDIATE (INTERNAL IRQs DISPATCHED), ISOL_CPUS_MASK: 0).
[  265.087429] SYSINFO: CPUs 2, LINUX APIC IRQ 2312, TIM_FREQ 12467820, CLK_FREQ 2393909000, CPU_FREQ 2393909000
[  265.087432] RTAI_APIC_TIMER_IPI: RTAI DEFINED 2314, VECTOR 2314; LINUX_APIC_TIMER_IPI: RTAI DEFINED 2312, VECTOR 2312
[  265.087435] TIMER NAME: lapic; VARIOUSLY FOUND APIC FREQs: 12467820, 12467820, 10591250
[  265.105746] RTAI[malloc]: global heap size = 2097152 bytes, <BSD>.
[  265.105793] , <uses LINUX SYSCALLs>, kstacks pool size = 524288 bytes.
[  265.105798] RTAI[sched]: hard timer type/freq = APIC/12467820(Hz); default timing: oneshot; linear timed lists.
[  265.105801] RTAI[sched]: Linux timer freq = 250 (Hz), TimeBase freq = 2393909000 hz.
[  265.105804] RTAI[sched]: timer setup = 999 ns, resched latency = 2944 ns.
[  265.121707] RTAI[math]: loaded.
[  280.420366] hm2: loading Mesa HostMot2 driver version 0.15
[  298.531635] hm2_pci: loading Mesa AnyIO HostMot2 driver version 0.7
[  298.531683] hm2_pci: discovered 5i25 at 0000:04:00.0
[  298.534215] hm2/hm2_5i25.0: Smart Serial Firmware Version 43
[  298.590659] Board hm2_5i25.0.7i73.0.1 Hardware Mode 0 = nokeyboardnodisplay
[  298.592245] Board hm2_5i25.0.7i73.0.1 Software Mode 0 = inputoutputencoder
[  298.594157] Board hm2_5i25.0.7i73.0.1 Software Mode 1 = inputoutputencoderanalog
[  298.596093] Board hm2_5i25.0.7i73.0.1 Software Mode 2 = inputoutputencoderanalog
[  298.597599] Board hm2_5i25.0.7i73.0.1 Hardware Mode 1 = nokeyboarddisplay
[  298.599570] Board hm2_5i25.0.7i73.0.1 Software Mode 0 = inputoutputencoderdisplay
[  298.601930] Board hm2_5i25.0.7i73.0.1 Software Mode 1 = inputoutputencoderanalogdisplay
[  298.604521] Board hm2_5i25.0.7i73.0.1 Software Mode 2 = inputoutputencoderanalogwidedisplay
[  298.606266] Board hm2_5i25.0.7i73.0.1 Hardware Mode 2 = keyboard4by8nodisplay
[  298.608498] Board hm2_5i25.0.7i73.0.1 Software Mode 0 = inputoutputencoderkeycode4by8
[  298.611078] Board hm2_5i25.0.7i73.0.1 Software Mode 1 = inputoutputencoderanalogkeycode4by8
[  298.613666] Board hm2_5i25.0.7i73.0.1 Software Mode 2 = inputoutputencoderanalogkeycode4by8
[  298.615280] Board hm2_5i25.0.7i73.0.1 Hardware Mode 3 = keyboard4by8display
[  298.617929] Board hm2_5i25.0.7i73.0.1 Software Mode 0 = inputoutputencoderdisplaykeycode4by8
[  298.620938] Board hm2_5i25.0.7i73.0.1 Software Mode 1 = inputoutputencoderanalogdisplaykeycode4by8
[  298.624187] Board hm2_5i25.0.7i73.0.1 Software Mode 2 = inputoutputencoderanalogwidedisplaykeycode4by8
[  298.625920] Board hm2_5i25.0.7i73.0.1 Hardware Mode 4 = keyboard8by8nodisplay
[  298.628152] Board hm2_5i25.0.7i73.0.1 Software Mode 0 = inputoutputencoderkeycode8by8
[  298.630732] Board hm2_5i25.0.7i73.0.1 Software Mode 1 = inputoutputencoderanalogkeycode8by8
[  298.633309] Board hm2_5i25.0.7i73.0.1 Software Mode 2 = inputoutputencoderanalogkeycode8by8
[  298.634922] Board hm2_5i25.0.7i73.0.1 Hardware Mode 5 = keyboard8by8display
[  298.637583] Board hm2_5i25.0.7i73.0.1 Software Mode 0 = inputoutputencoderdisplaykeycode8by8
[  298.640580] Board hm2_5i25.0.7i73.0.1 Software Mode 1 = inputoutputencoderanalogdisplaykeycode8by8
[  298.643806] Board hm2_5i25.0.7i73.0.1 Software Mode 2 = inputoutputencoderanalogwidedisplaykeycode8by8
[  298.760693] hm2/hm2_5i25.0: 34 I/O Pins used:
[  298.760698] hm2/hm2_5i25.0:     IO Pin 000 (P3-01): StepGen #0, pin Direction (Output)
[  298.760701] hm2/hm2_5i25.0:     IO Pin 001 (P3-14): StepGen #0, pin Step (Output)
[  298.760704] hm2/hm2_5i25.0:     IO Pin 002 (P3-02): StepGen #1, pin Direction (Output)
[  298.760706] hm2/hm2_5i25.0:     IO Pin 003 (P3-15): StepGen #1, pin Step (Output)
[  298.760709] hm2/hm2_5i25.0:     IO Pin 004 (P3-03): StepGen #2, pin Direction (Output)
[  298.760712] hm2/hm2_5i25.0:     IO Pin 005 (P3-16): StepGen #2, pin Step (Output)
[  298.760714] hm2/hm2_5i25.0:     IO Pin 006 (P3-04): StepGen #3, pin Direction (Output)
[  298.760717] hm2/hm2_5i25.0:     IO Pin 007 (P3-17): StepGen #3, pin Step (Output)
[  298.760720] hm2/hm2_5i25.0:     IO Pin 008 (P3-05): StepGen #4, pin Direction (Output)
[  298.760723] hm2/hm2_5i25.0:     IO Pin 009 (P3-06): StepGen #4, pin Step (Output)
[  298.760725] hm2/hm2_5i25.0:     IO Pin 010 (P3-07): IOPort
[  298.760727] hm2/hm2_5i25.0:     IO Pin 011 (P3-08): IOPort
[  298.760730] hm2/hm2_5i25.0:     IO Pin 012 (P3-09): Smart Serial Interface #0, pin TxData1 (Output)
[  298.760733] hm2/hm2_5i25.0:     IO Pin 013 (P3-10): Smart Serial Interface #0, pin RxData1 (Input)
[  298.760736] hm2/hm2_5i25.0:     IO Pin 014 (P3-11): Muxed Encoder #0, pin Muxed Index (Input)
[  298.760738] hm2/hm2_5i25.0:     IO Pin 015 (P3-12): Muxed Encoder #0, pin Muxed B (Input)
[  298.760741] hm2/hm2_5i25.0:     IO Pin 016 (P3-13): Muxed Encoder #0, pin Muxed A (Input)
[  298.760744] hm2/hm2_5i25.0:     IO Pin 017 (P2-01): IOPort
[  298.760746] hm2/hm2_5i25.0:     IO Pin 018 (P2-14): IOPort
[  298.760748] hm2/hm2_5i25.0:     IO Pin 019 (P2-02): IOPort
[  298.760750] hm2/hm2_5i25.0:     IO Pin 020 (P2-15): IOPort
[  298.760752] hm2/hm2_5i25.0:     IO Pin 021 (P2-03): IOPort
[  298.760754] hm2/hm2_5i25.0:     IO Pin 022 (P2-16): IOPort
[  298.760756] hm2/hm2_5i25.0:     IO Pin 023 (P2-04): IOPort
[  298.760758] hm2/hm2_5i25.0:     IO Pin 024 (P2-17): IOPort
[  298.760760] hm2/hm2_5i25.0:     IO Pin 025 (P2-05): IOPort
[  298.760762] hm2/hm2_5i25.0:     IO Pin 026 (P2-06): IOPort
[  298.760765] hm2/hm2_5i25.0:     IO Pin 027 (P2-07): Muxed Encoder Select #2, pin Mux Select 0 (Output)
[  298.760768] hm2/hm2_5i25.0:     IO Pin 028 (P2-08): Muxed Encoder #1, pin Muxed A (Input)
[  298.760770] hm2/hm2_5i25.0:     IO Pin 029 (P2-09): Muxed Encoder #1, pin Muxed B (Input)
[  298.760773] hm2/hm2_5i25.0:     IO Pin 030 (P2-10): Muxed Encoder #1, pin Muxed Index (Input)
[  298.760776] hm2/hm2_5i25.0:     IO Pin 031 (P2-11): Muxed Encoder #2, pin Muxed A (Input)
[  298.760778] hm2/hm2_5i25.0:     IO Pin 032 (P2-12): Muxed Encoder #2, pin Muxed B (Input)
[  298.760781] hm2/hm2_5i25.0:     IO Pin 033 (P2-13): Muxed Encoder #2, pin Muxed Index (Input)
[  298.760875] hm2/hm2_5i25.0: registered
[  298.760878] hm2_5i25.0: initialized AnyIO board at 0000:04:00.0
[ 1005.398790] hm2_5i25.0: dropping AnyIO board at 0000:04:00.0
[ 1005.398796] hm2/hm2_5i25.0: unregistered
[ 1005.398859] hm2_pci: driver unloaded
[ 1005.400828] hm2: unloading
[ 1005.450866] RTAI[math]: unloaded.
[ 1005.452939] SCHED releases registered named ALIEN PEDV$D
[ 1005.458863] RTAI[malloc]: unloaded.
[ 1005.556014] RTAI[sched]: unloaded (forced hard/soft/hard transitions: traps 0, syscalls 0).
[ 1005.557976] I-pipe: head domain RTAI unregistered.
[ 1005.558015] RTAI[hal]: unmounted.
cnc@CNCMILL:~$
Last edit: 06 Mar 2019 13:33 by Peter.

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09 Mar 2019 01:52 #128122 by Peter
Hi Everyone, I am trying to get scales going on a 7i85.

my last 2 posts are the outputs from show pin and dmesg.

upon review I am confused by the output.

show pin shows encoders 0-5 on the 5i25. though the 7i85 has 4 and the 7i76 has 1

also the output from dmesg seems to show 3.
I am sure this is just me though I am stuck.

any help much appreciated,

-Peter

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09 Mar 2019 03:02 #128125 by PCW
The reason there are 6 encoders is that LinuxCNCs hm2 driver cannot mix encoder types, and since the 7I85S needs muxed encoders, the 7I76 must used muxed encoders This means that you end up with a dummy encoder (encoder 1) that duplicates encoder 0 on the 7I76 (the 7I85S has encoders 2 through 5)

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09 Mar 2019 03:07 #128126 by Peter
Hi and thanks for that.

I have the non "S" variant of the 7i85 though I assume the same can be said?

do you have any insight in why dmesg only reports 3?

can you point me to any resources regarding next steps for reading the scales?

-Peter

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09 Mar 2019 03:48 #128128 by PCW
Yes the encoder part of the 7I85 is the same as the 7I85S

Dmesg reports the pins for 3 multiplexed encoders (each set of pins for a
muxed encoder supports 2 actual encoders)

What are your intentions for the scales?

Even if you intend to use the scales in the final configuration, I would start with a standard step/dir configuration and get it working before proceeding

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09 Mar 2019 04:00 #128129 by Peter
That sounds reasonable, I have moved the motors in the test/tune axis configuration screens.
I am hoping to use the mill in a sort of power feed and DRO configuration most of the time, with occasional CNCing.

If possible I would like eventually to get a PID loop going.
Not for lost steps, as much as some backlash compensation

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