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The pinout is determined by the pinout file (PINXXXX.vhd)
This file is identical for Xilinx or Efinix chips. Basically to make
a new pinout, you copy an existing pinout file ( one that's similar
to what you want) to your new pinout file, edit that file to match
the required pinout and module counts. Add that new file to
the project  (with "Edit Project" --> "Design" -->  "Add design file")
and include  it in the toplevel source file (TopEthernet16HostMot2_efx.vhd)
by adding it like this:

---

--use work.PIN_7I85SD_7I76_SSI_34.all;
--use work.PIN_PMDX126x2_34.all;
use work.PIN_NEWPINOUTFILE_34.all;  <<<<<<<< 
--use work.PIN_7I85S_4PWMD_34.all;
--use work.PIN_APSX_SWISS.all;
--use work.PIN_IOONLY_34.all;
--use work.PIN_ST8_RC8_34.all;   


Note that only one pinout file is uncommented



The .xml files are for the project manager and the interface designer
you do not edit them directly, nor do you change anything with the interface
designer unless you have different hardware (a custom FPGA card for example)

 

I forgot to mention, in case of dual-purpose pins like the PINOUT_WLED1_DATA of the Tangbob board, it needs to be configured as regular I/O pin. (It is a dedicated SSPI pin.) In the IDE, it can be done under Place&Route -> Configuration by right mouse click.

Thanks for solving the diff issue, it has given me a real headache.

The Compile button is enabled now and I am going to check, if it compiles etc.

By the way, Tangbob config.json contains a plugin "blink" mapped to pin10, which is not available on the Tangbob FPGA board (not wired on your PCB). Furthermore, pin10 belongs to the bank 3, which works with 1.8V (not 3.3V) causing an error when placing in the toolchain.
(I used the generated files from your program in the Windows Gowin IDE for running the whole process. It gives me more control what's going on during the processing)

SPI should work though a Efinix specific top level file would need to be
made from the Xilinx source.  Efinix tools don't automatically
translate "Z" types into tristate pins so you have to export the signal
_and_ enable pins from the top level file. Note for the current SPI source
(GCSPI) The SPI clock must be routed to a FPGA clock pin.

Any package is OK

Hello,
i finished with my linuxcnc setup and now i have some trouble with the accuracy.
Im using qtDragon and the newest version of linuxcnc (2.9.3 i think).I home my maschine first and after i send it to the G54 g0 x0 y0 z0 and the machine is going there but not reaching exactly the 0 position.
anyone could maybe help me or explain me?