Hello everyone here, I have been doing some reading about XBAR in the rt1052 refence manual (tedious), Following a comment from Scott about XBAR, to implement a Quadrature Encoder/Decoder (QDC) module it is necessary to use this module because it is not possible to map the input pads of the NVEM boards to the QDCs using IOMUX,After taking a look I have managed to understand a few things, the XBAR is a great multiplexer partly independent of IOMUX, partly because many XBAR signals coincide on inputs and outputs e.g. this house for high speed), I have done a small count of the pins mapped as inputs on the EC500 and due to the number of input pins that match XBAR, up to 2 encoders could be connected, I have used part of the C remora version file -rt1052 for counting:
#define IN01_PORT GPIO3 //GPIO_EMC_39/**/Impossible Mux
#define IN01_PIN 25
#define IN02_PORT GPIO4 //GPIO_EMC_13/**/XBAR1_IN25
#define IN02_PIN 13
#define IN03_PORT GPIO4 //GPIO_EMC_14/**/XBAR1_INOUT19
#define IN03_PIN 14
#define IN04_PORT GPIO3 //GPIO_EMC_38/**/Impossible Mux
#define IN04_PIN 24
#define IN05_PORT GPIO3 //GPIO_EMC_32/**/Impossible Mux
#define IN05_PIN 18
#define IN06_PORT GPIO4 //GPIO_EMC_31/**/Impossible Mux
#define IN06_PIN 31
#define IN07_PORT GPIO4 //GPIO_EMC_27/**/Impossible Mux
#define IN07_PIN 27
#define IN08_PORT GPIO3 //GPIO_EMC_35/**/XBAR1_INOUT18
#define IN08_PIN 21
#define IN09_PORT GPIO3 //GPIO_EMC_33/**/Impossible Mux
#define IN09_PIN 19
#define IN10_PORT GPIO3 //GPIO_EMC_34/**/Impossible Mux
#define IN10_PIN 20
#define IN11_PORT GPIO4 //GPIO_EMC_00/**/XBAR1_IN02
#define IN11_PIN 0
#define IN12_PORT GPIO3 //GPIO_EMC_37/**/XBAR1_IN23
#define IN12_PIN 23
#define IN13_PORT GPIO4 //GPIO_EMC_28/**/Impossible Mux
#define IN13_PIN 28
#define IN14_PORT GPIO4 //GPIO_EMC_15/**/XBAR1_IN20
#define IN14_PIN 15
#define IN15_PORT GPIO4 //GPIO_EMC_25/**/Impossible Mux
#define IN15_PIN 25
#define IN16_PORT GPIO4 //GPIO_EMC_09/**/Impossible Mux
#define IN16_PIN 9
There are 6 pads that can be mutiplexed using XBAR, in this case the output signals in XBAR would be those corresponding to the QDC (1 to 4).
I leave a link to the
NXP forum
where the above is mentioned, I hope it helps, greetings
