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Can the OPI5 be Configured to Run LCNC?
- Bari
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3 years 9 months ago - 3 years 9 months ago #263199
by Bari
Replied by Bari on topic Can the OPI5 be Configured to Run LCNC?
Just FYI: The servo thread is the one of interest for use with Mesa over Ethernet, not the base thread. The same is true with Remora using SPI to connect to an external microcontroller. I believe the RK3588 has three (3) integrated Cortex M0 micros but I don't think that the register specs to connect to them is in the public or leaked docs.
u-boot should be configured to be at one set core frequency. It should not be jumping between core speeds as this causes latency jitter. The system gets halted for at least several hundred core clock cycles while it waits for the clock speed to stabilize and this shows up as a latency spike.
u-boot should be configured to be at one set core frequency. It should not be jumping between core speeds as this causes latency jitter. The system gets halted for at least several hundred core clock cycles while it waits for the clock speed to stabilize and this shows up as a latency spike.
Last edit: 3 years 9 months ago by Bari.
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3 years 9 months ago #263203
by royka
Replied by royka on topic Can the OPI5 be Configured to Run LCNC?
I've read about the base thread not being used for Mesa, I've included that one to see if it might even be usable for software stepping for as long as the MCU's are not in use.
I thought that setting the governor at performance would prevent it from scaling, but that's not enough?
The arch timer had also some interrupts at cpu 5 so perhaps if that one will be disabled on the isolated cpus the latency will improve, not sure yet how to implement that. Here it's explained how to do it on another SBC: community.nxp.com/t5/QorIQ/How-to-move-o...nterrupt/m-p/1046574
The legacy kernel is btw 5.10.110 and only found a rt patch for 5.10.109 was hoping it was close enough. That might be the reason it will not compile with these patches.
I thought that setting the governor at performance would prevent it from scaling, but that's not enough?
The arch timer had also some interrupts at cpu 5 so perhaps if that one will be disabled on the isolated cpus the latency will improve, not sure yet how to implement that. Here it's explained how to do it on another SBC: community.nxp.com/t5/QorIQ/How-to-move-o...nterrupt/m-p/1046574
The legacy kernel is btw 5.10.110 and only found a rt patch for 5.10.109 was hoping it was close enough. That might be the reason it will not compile with these patches.
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3 years 9 months ago #263207
by Bari
Replied by Bari on topic Can the OPI5 be Configured to Run LCNC?
If the specs to the Cortex-M0 micros become or already are available then Remora or the other OpiCNC project firmware might be ported to work with the RK3588. The stepgens would be on the M0 micros and a servo thread would be used to update them.
The Allwinner/Orangepi project allwincnc.github.io/index.html
The Allwinner/Orangepi project allwincnc.github.io/index.html
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3 years 8 months ago #263864
by Bari
Replied by Bari on topic Can the OPI5 be Configured to Run LCNC?
Found the u-boot sources here for the Radxa Rock5
wiki.radxa.com/Rock5/dev/Debian
The Radxa Rock5 is very similar to the Opi5. I haven't found the sources for the Opi5 u-boot from orange Pi yet.
The Radxa Rock5 is very similar to the Opi5. I haven't found the sources for the Opi5 u-boot from orange Pi yet.
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3 years 8 months ago - 3 years 8 months ago #263866
by royka
That's the one Armbian also use for the OPI5 images, with this patch:
[url] github.com/armbian/build/blob/master/pat...oard-orangepi5.patch [/url]
[url] github.com/orangepi-xunlong/u-boot-orangepi.git [/url]
After editing some of the rt patches, hoping that after I fix the first few patches the follow up patches would apply without errors, but of course they didn't, I found there is actually a kernel from Rockchip with the rt patches meant for Android:
[url] github.com/rockchip-linux/kernel/tree/develop-5.10-rt53 [/url]
Had to make s small patch and disable some things in the kernel-config to make it compile. It did boot, but the whole system got stuck after a while every time and it was still not a full realtime kernel. I know made some config errors. Will look further into it soon.
Replied by royka on topic Can the OPI5 be Configured to Run LCNC?
[url] github.com/armbian/build/blob/master/pat...oard-orangepi5.patch [/url]
[url] github.com/orangepi-xunlong/u-boot-orangepi.git [/url]
After editing some of the rt patches, hoping that after I fix the first few patches the follow up patches would apply without errors, but of course they didn't, I found there is actually a kernel from Rockchip with the rt patches meant for Android:
[url] github.com/rockchip-linux/kernel/tree/develop-5.10-rt53 [/url]
Had to make s small patch and disable some things in the kernel-config to make it compile. It did boot, but the whole system got stuck after a while every time and it was still not a full realtime kernel. I know made some config errors. Will look further into it soon.
Last edit: 3 years 8 months ago by royka. Reason: Hell to edit a post
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3 years 8 months ago #263965
by royka
Replied by royka on topic Can the OPI5 be Configured to Run LCNC?
After applying an overlay to overclock the big cores to 2.4ghz the max jitter of the servo thread is 25us with 4x glxgears and playing 4k YouTube.I've added a screenshot and the compiled overlay from
a patch of github
Boot parameter: isolcpus=5,7
If someone is getting more jitter with this overlay I could upload my kernel (settings).
Too bad, just before I'd finished this message the max jitter went to 54us (after about 45min running) Need to say that I've running tvheadend with an USB dvb tuner and zigbee2mqtt in the background as well.
Arch timer interrupts a lot on cpu7, but there is also a rk timer which avoids cpu 5 and 7 as it should.
Could the rk timer function as a replacement of arch timer?
Boot parameter: isolcpus=5,7
If someone is getting more jitter with this overlay I could upload my kernel (settings).
Too bad, just before I'd finished this message the max jitter went to 54us (after about 45min running) Need to say that I've running tvheadend with an USB dvb tuner and zigbee2mqtt in the background as well.
Arch timer interrupts a lot on cpu7, but there is also a rk timer which avoids cpu 5 and 7 as it should.
Could the rk timer function as a replacement of arch timer?
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