LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)

I can confirm that generic_spi communicate with board.

@MirkoCNC
And not just headers, but also SPI lines. They should be as short as possible. I tested on my bord at 4Mhz no errors at 4.5Mhz wrong data and to many errors.

Zayoo wrote:

I can confirm that generic_spi communicate with board.

@MirkoCNC
And not just headers, but also SPI lines. They should be as short as possible. I tested on my bord at 4Mhz no errors at 4.5Mhz wrong data and to many errors.
 

Something must be awfully wrong somewhere if constraint to only 4meg. I can do 50Mhz no problem with a dedicated PLL clock and differential data lines (terminated at only one end). And more or less 25Mhz over cheap/inductive dupon jumper wires... 

meister wrote:

 

Can't recommend this set-up enough. For those who aren't particularly interested in engineering hardware and want a Snap-On Ready Kit, it just won't get any better than that. That'll do 50meg, prolly capable of more. Oliver did it all for grab  github.com/multigcs/rio-tangbob

Flash the bitstream over, plug-in a shielded 100mb cat6, and be done!!

the SPI speed depends also on the FPGA-Clock, the SPI-Slave is programmed in verilog and need some clock cycles.

So you need a higher FPGA-Clock or someone have to program a plugin based on the buildin spi slave, but this can not be ported between the different FPGA's (gowin, ice40, ...) and the pins are not freely choosable

If I recall correctly I've PLL a fpga gpio at 50meg so to rid of that wizzy OSC extra part (im cheap, I know lol). If not 50M SPI then for sure it's full on 25Mhz and plenty capable kit. 

Doesn't matter, what's important to pay attention is something ain't right at 4Mhz, I suspect Lcnc won't be happy about that in fact. Perhaps the raspi is to be avoided if running on such a lazy tick?

What happened with enable and error hardware implementation in riocore?