Mesa 5i20 - 7I52S support
- boyzo
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- PCW
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- boyzo
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<pins>
<pin>
<connector>P2</connector>
<secondarymodulename>None</secondarymodulename>
<secondaryfunctionname>???</secondaryfunctionname>
</pin>
<pin>
<connector>P2</connector>
<secondarymodulename>MuxedQCount</secondarymodulename>
<secondaryfunctionname>Muxed Phase A (in)</secondaryfunctionname>
<secondaryinstance>0</secondaryinstance>
</pin>
<pin>
<connector>P2</connector>
<secondarymodulename>MuxedQCount</secondarymodulename>
<secondaryfunctionname>Muxed Phase B (in)</secondaryfunctionname>
<secondaryinstance>0</secondaryinstance>
</pin>
<pin>
<connector>P2</connector>
<secondarymodulename>MuxedQCount</secondarymodulename>
<secondaryfunctionname>Muxed Index (in)</secondaryfunctionname>
<secondaryinstance>0</secondaryinstance>
</pin>
<pin>
<connector>P2</connector>
<secondarymodulename>MuxedQCount</secondarymodulename>
<secondaryfunctionname>Muxed Phase A (in)</secondaryfunctionname>
<secondaryinstance>1</secondaryinstance>
</pin>
</pins>
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- PCW
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have you tested the actual index inputs?
I dont think pncconf can do anything to make them _not_ work
worst case you will have to hand edit the HAL file to connect them
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- cmorley
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longer answer.
The readme shows the pinout for the Mesa MAINBOARD (5i20 in this case) not the daughter board connected to it.
In the muxed encoder case a single mainboard pin does not correspond to a single encoder.
So the readme just tells you the encoder component number in general for the signalname.
Most components that PNCcond configures for have a one to one relationship between the pin and the combobox.
These components such as regular pwm and regular encoders don't necessarily require a daughter board.
others such as mux encoders and resolvers etc require a daughter board and so the one to one relationship sometimes must be ignored.
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- cmorley
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I need to add sserial info to the readme too, so much to do ....
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- boyzo
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Do you have a suggestion for what the readme should say to clear up the confusion?
I need to add sserial info to the readme too, so much to do ....
There is relationship between 7I52S daughter card and I/O Connector 2 Encoder Configuration.I would expect that README document relationship between drop-down selected encoder (i.e. ecoder-x) and 7i52s PIN layout, where encoder is connected to.
encoder-x - P5 PINS 1 QA0, 2 /QA0,3 GND, 4 QB0, 5 /QB0, 6 +5V, 7 IDX0, ....
encoder-y - P5 PINS 9 QA1, 10 /QA1,11 GND, 12 QB1 ...
encoder-z - P4 PINS 1 QA0, 2 /QA0,3 ....
Does this make sense?
Another solution would be just to say that encoder connection should be done according to 7i52s documentation.
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- cmorley
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At the moment the read me just tells you what the mainboard connections are.
In the case of mux encoders it tells you that encoder 0 is connected to signal X which could help you with connection
on the daughter board by looking up encoder 0 in the manual and then figuring out which pins connect it.
have to think on it more...
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- PCW
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The change is needed to support sets of modules with more
than 2 different register or instance strides. Since its being
changed I plan to make some unrelated changes. One being adding
another clock (ClockMed), and another being adding daughter-board
hints. Daughter-board hints will have the (class) name of a suggested
daughter-board for each pin range
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- boyzo
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Halscope shows correct signals coming in.
Any suggestion?
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