Mesa 7i90 in SPI mode

It would probably be useful to have your changes incorporated into Mesaflash. But I am not sure who looks after that code. I don't _think_ is is part of LinuxCNC as such.

I think, the only possible solution is - fix RPi3 spidev driver to support 32 bit transfers. The 32-bit word transfers are deeply integrated in linuxcnc modules. I have the same problem with ODROID-C1, which uses driver similar to RPi3 therefore it also does not support more than 8bit transfer..

mesaflash makes its home at github.com/micges/mesaflash — I hope a pull request to make it work on a wider range of hardware would be welcomed.

My experience with /dev/spidev so far is that the drivers are typically low quality. Which is sad. Problems seem to include

• limited transfer width support (rpi3, odroid-c1)
• incorrect byte order handling (odroid xu4, byte order is fixed in devicetree, not by ioctl)
• poor latency (u3, xu4, rpi3 without kernel patches)

This really stinks, because on the surface SPI is a perfect bus for LinuxCNC on SBCs, owing to its near-ubiquity and having a standard location on pi-like 40-pin headers to boot.

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Yes, I have looked at the hm2_rpspi option and not been successful (yet). Tried on two RPi3s and an RPi2 but haven't pulled it together.

I forked mesaflash and posted my 8-bit word fallback solution. Please take look at the spi_boards.c modification. I cleaned up my original work. github.com/resojoe/mesaflash

The port of this functionality to LinuxCNC itself (similar modification to src/hal/drivers/mesa-hostmot2/hm2_spi.c) seems to be working for me. If you take a close look at the RPi3 SPI driver (drivers/spi/spi-bcm2835.c) you'll find transfers handled three different ways: if a transfer is calculated to take < 30us polling logic is used; if a transfer is >96 bytes DMA is used; if neither of the first two an IRQ-based method. I don't see any sleeps or obvious slow-downs in the various paths. That said I do get an occasional "unexpected RT delay" message. Any guidance as to what to look for would be appreciated. Jepler - I did look at your SPI driver patch addressing the dynamic DMA allocation. Perhaps there is something similar in this bcm2835 module and I haven't recognized it.

Necessary config file changes:
7i90.ini - change DRIVER attribute to hm2_spi
hm2-stepper.hal - append "spi_path=/dev/spidev0.0" to the loadrt [HOSTMOT2](DRIVER) config=[HOSTMOT2](CONFIG) line.

- Joe

The changes on github look good to me in general. My ARM hardware is all put away so I can't test it right now, though.

I did go ahead and create a pull request on github, so that hopefully micges will incorporate your change.

Thanks!