Mesa 7i90 in SPI mode

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10 years 7 months ago - 10 years 7 months ago #71347 by PCW
Replied by PCW on topic Mesa 7i90 in SPI mode
Any bitfile should work for boostrapping

Suggested programming method:

write SPI config to FPGA via JTAG (NOT to flash)
use mesaflash to write fallback SPI config to flash
use mesaflash to write user config to flash
Last edit: 10 years 7 months ago by PCW.

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10 years 7 months ago #71980 by kaklik
Replied by kaklik on topic Mesa 7i90 in SPI mode
OK, I have the first success with mesa 7i90. I loaded the 7i90_spi_justio.bit bitfile to the FPGA trough XVC . Then I tried to initialize linuxcnc hostmot2 driver.
Code:
Note: Using POSIX non-realtime hm2: loading Mesa HostMot2 driver version 0.15 probing device /dev/spidev0.0 with rate 500000 Hz Invalid cookie Read: 00000000 00000000 00000000 00000000 hm2_spi: rtapi_app_main: No such device (-19) mesa_test.hal:2: waitpid failed /home/odroid/repos/linuxcnc-MLAB/bin/rtapi_app hm2_spi mesa_test.hal:2: /home/odroid/repos/linuxcnc-MLAB/bin/rtapi_app exited without becoming ready mesa_test.hal:2: insmod for hm2_spi failed, returned -1 halcmd:

But I got the Invalid cookie error again although 7i90 card respond by some data on SPIOUT as is shown in following figure:

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10 years 7 months ago #71989 by kaklik
Replied by kaklik on topic Mesa 7i90 in SPI mode
I tried to use mesaflash utility by running this command:

./mesaflash --device 7I90 --spi --addr /dev/spidev0.0 --fallback --write ../7i90/configs/fallback/7i90_spi_fallback.bit
Unexpected cookie at 0000..000c:
00000000 00000000 00000000
No 7I90 board found

But the result is almost the same as in case of hostmot2 driver initialization. The oscilloscope image is exactly the same.

What is correct "cookie" which I should get from the board?

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10 years 7 months ago - 10 years 7 months ago #71991 by PCW
Replied by PCW on topic Mesa 7i90 in SPI mode
The low level register information is documented the the regmap file included in the vhdl source zipfile

Unexpected cookie at 0000..000c: is odd also but maybe OK (the cookie is at 0x0100)

Its possible you have a polarity or SI issue if the SPI interface cannot read the cookie correctly
Note, SI issues on the SPI clock are not really clock speed dependent (they are edge rate dependent)
so running at a low clock speed will not help. Any significant ringing or ground bumping will cause trouble
Last edit: 10 years 7 months ago by PCW.

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  • jepler
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10 years 7 months ago #72000 by jepler
Replied by jepler on topic Mesa 7i90 in SPI mode
Code:
if (spi_read(&(board->llio), HM2_COOKIE_REG, &buf, sizeof(buf)) < 0) { return; } if(memcmp(buf, cookie, sizeof(cookie))) { fprintf(stderr, "Unexpected cookie at 0000..000c:\n%08x %08x %08x\n", buf[0], buf[1], buf[2]); return; }

mesaflash is trying to read the cookie at the normal location (HM2_COOKIE_REG is 0x0100), just the message is incorrect about what location it tried to read. The expected value of the cookie is
Code:
u32 cookie[] = {0x55aacafe, 0x54534f48, 0x32544f4d};

It looks like two independent users of spidev are both reading all zeroes instead of the expected value (hm2_spi and mesaflash do not share any source code, though I think I wrote both sets of code), so I would look at the kernel driver or the wiring as the source of the problem.

There are spidev test programs out there and you can just loop the output back to the input to see whether the kernel driver and hardware are working properly. I'd do that before continuing with mesaflash or linuxcnc, just so you know the odroid's spi hardware and the kernel driver are working like you expect

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10 years 7 months ago - 10 years 7 months ago #72009 by kaklik
Replied by kaklik on topic Mesa 7i90 in SPI mode
I tested the SPI by looping the master SPI IN and OUT signals as jepler suggested. Then I noticed the 7i90 SPI output always responds by the same word as in case where SPI IN is connected to the ODROID's master SPI or not..

The data word responded is 0xAAAAAAAA as is mentioned in hm2_spi.c source. Therefore I expect the root of the problem is in fact that 7i90 board do not understand to the SPI data sent by ODROID.

Copy of hm2_spi.c source code. where the A code is expected? - I do not understand this code well.
Code:
// because linux manages SPI chip select behind our backs, we can't know // whether to expect the "AAAAAAAA" cookie to appear in the first // word of the response. that's too bad, because checking this // would give a minimum level of detection of gross problems such as // a disconnected cable. uint32_t *buf = this->trxbuf; uint32_t **scatter = this->scatter; int i=0; for(i=0; i<this->nbuf; i++) { uint32_t *target = scatter[i]; if(target) *target = buf[i]; } this->nbuf = 0; return 1; }

But If I look on the SPI IN signal (At the 7i90 board side with using the 7i90 board ground) The data signal looks fine without any significant signal integrity failures. The oscilloscope image follows. The blue line is SPI data IN (MASTER output) and yellow line is SPI clock signal..



Have you some suggestion what other signal parameters may affect the SPI transmission and could be different from Jeff Epler ODROID-U3 setup? The TXB0104 voltage level translator used in case of ODROID-U3 is non-inverting. Therefore the signal polarity must be the same as in case of direct signal connection between ODROID-C1 and 7i90 board.
Last edit: 10 years 7 months ago by kaklik.

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