Xilinx Zynq 7010 fpga crypto windfall boards

More
21 Jul 2025 00:16 #332094 by tokomak
Replied by tokomak on topic Xilinx Zynq 7010 fpga crypto windfall boards
avalon 841
Attachments:

Please Log in or Create an account to join the conversation.

More
23 Aug 2026 21:50 #348944 by murdemon
Replied by murdemon on topic Xilinx Zynq 7010 fpga crypto windfall boards
I am compiling kernel with RT patch and hostmot2 bitstream for board. Install linuxCNC in headless config, all main modules works, except smartserial, now working on it. LinuxCNC 2.9 , hostmot2 FPGA from Zboard .. If interesting can share Vivado 2025.2 project and SD card image.
The following user(s) said Thank You: meister

Please Log in or Create an account to join the conversation.

More
24 Aug 2026 04:47 #348951 by meister
Replied by meister on topic Xilinx Zynq 7010 fpga crypto windfall boards
sd-image would be nice :)

Please Log in or Create an account to join the conversation.

More
24 Aug 2026 09:07 #348953 by meister
Replied by meister on topic Xilinx Zynq 7010 fpga crypto windfall boards
BTW: In the meantime, I’d also carried on working with the board and had a bare-metal LwIP bridge up and running, via the built-in network / bootable via.
but need more testing

Please Log in or Create an account to join the conversation.

More
24 Aug 2026 10:24 #348955 by murdemon
Replied by murdemon on topic Xilinx Zynq 7010 fpga crypto windfall boards
disk.yandex.ru/d/wWys1FiCtXp55w hre is vivado project and so on
The following user(s) said Thank You: meister

Please Log in or Create an account to join the conversation.

More
25 Aug 2026 10:32 #348998 by murdemon
Replied by murdemon on topic Xilinx Zynq 7010 fpga crypto windfall boards
Pins for smart serial is in Pin descriptor from IDROM of ZYNQ hostmot2 FPGA, but in usag it show as just IOPort, why it is can happens? I doing some mistake , or it is some logic of work when nothink findout on smart serial?

ubuntu@arm:~$ ./start_linuxcnc.sh
This script only needs to be run once per shell session.
LINUXCNC - 2.9.10
Machine configuration directory is '/home/ubuntu/linuxcnc-dev/configs/test'
Machine configuration file is 'puma560.ini'
check_config: Unchecked: [KINS]KINEMATICS=genserkins
Starting LinuxCNC...
linuxcnc TPMOD=tpmod HOMEMOD=homemod EMCMOT=motmod
Note: Using POSIX realtime
Found file(LIB): /home/ubuntu/linuxcnc-dev/lib/hallib/basic_sim.tcl
setup_kins: cmd=loadrt genserkins

userkKinematicsSetup:
emc/kinematics/userkfuncs.c max_joints=9 allow_duplicates=0

setup_kins: unknown [KINS]KINEMATICS=
Found file(REL): ./puma560_dh.hal
hm2: loading Mesa HostMot2 driver version 0.15
hm2/hm2_soc_ol: Low Level init 0.15
hm2/hm2_soc_ol: 34 HM2 Pin Descriptors:
hm2/hm2_soc_ol: pin 0:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0xC1 (Smart Serial Interface)
hm2/hm2_soc_ol: Secondary Unit: 0x00
hm2/hm2_soc_ol: Secondary Pin: 0x81 (tx0, Output)
hm2/hm2_soc_ol: pin 1:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0xC1 (Smart Serial Interface)
hm2/hm2_soc_ol: Secondary Unit: 0x00
hm2/hm2_soc_ol: Secondary Pin: 0x01 (rx0, Input)
hm2/hm2_soc_ol: pin 2:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: pin 3:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: pin 4:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x05 (StepGen)
hm2/hm2_soc_ol: Secondary Unit: 0x00
hm2/hm2_soc_ol: Secondary Pin: 0x82 (Direction, Output)
hm2/hm2_soc_ol: pin 5:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x05 (StepGen)
hm2/hm2_soc_ol: Secondary Unit: 0x00
hm2/hm2_soc_ol: Secondary Pin: 0x81 (Step, Output)
hm2/hm2_soc_ol: pin 6:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x05 (StepGen)
hm2/hm2_soc_ol: Secondary Unit: 0x01
hm2/hm2_soc_ol: Secondary Pin: 0x82 (Direction, Output)
hm2/hm2_soc_ol: pin 7:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x05 (StepGen)
hm2/hm2_soc_ol: Secondary Unit: 0x01
hm2/hm2_soc_ol: Secondary Pin: 0x81 (Step, Output)
hm2/hm2_soc_ol: pin 8:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x05 (StepGen)
hm2/hm2_soc_ol: Secondary Unit: 0x02
hm2/hm2_soc_ol: Secondary Pin: 0x82 (Direction, Output)
hm2/hm2_soc_ol: pin 9:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x05 (StepGen)
hm2/hm2_soc_ol: Secondary Unit: 0x02
hm2/hm2_soc_ol: Secondary Pin: 0x81 (Step, Output)
hm2/hm2_soc_ol: pin 10:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x05 (StepGen)
hm2/hm2_soc_ol: Secondary Unit: 0x03
hm2/hm2_soc_ol: Secondary Pin: 0x82 (Direction, Output)
hm2/hm2_soc_ol: pin 11:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x05 (StepGen)
hm2/hm2_soc_ol: Secondary Unit: 0x03
hm2/hm2_soc_ol: Secondary Pin: 0x81 (Step, Output)
hm2/hm2_soc_ol: pin 12:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x1A (Hostmot2 DPLL)
hm2/hm2_soc_ol: Secondary Unit: 0x00
hm2/hm2_soc_ol: Secondary Pin: 0x82 (Ref Out Pin, Output)
hm2/hm2_soc_ol: pin 13:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x04 (Encoder)
hm2/hm2_soc_ol: Secondary Unit: 0x00
hm2/hm2_soc_ol: Secondary Pin: 0x01 (A, Input)
hm2/hm2_soc_ol: pin 14:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x04 (Encoder)
hm2/hm2_soc_ol: Secondary Unit: 0x00
hm2/hm2_soc_ol: Secondary Pin: 0x02 (B, Input)
hm2/hm2_soc_ol: pin 15:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x04 (Encoder)
hm2/hm2_soc_ol: Secondary Unit: 0x00
hm2/hm2_soc_ol: Secondary Pin: 0x03 (Index, Input)
hm2/hm2_soc_ol: pin 16:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: pin 17:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x06 (PWMGen)
hm2/hm2_soc_ol: Secondary Unit: 0x00
hm2/hm2_soc_ol: Secondary Pin: 0x81 (Out0 (PWM or Up), Output)
hm2/hm2_soc_ol: pin 18:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x06 (PWMGen)
hm2/hm2_soc_ol: Secondary Unit: 0x01
hm2/hm2_soc_ol: Secondary Pin: 0x81 (Out0 (PWM or Up), Output)
hm2/hm2_soc_ol: pin 19:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x06 (PWMGen)
hm2/hm2_soc_ol: Secondary Unit: 0x02
hm2/hm2_soc_ol: Secondary Pin: 0x81 (Out0 (PWM or Up), Output)
hm2/hm2_soc_ol: pin 20:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x05 (StepGen)
hm2/hm2_soc_ol: Secondary Unit: 0x04
hm2/hm2_soc_ol: Secondary Pin: 0x82 (Direction, Output)
hm2/hm2_soc_ol: pin 21:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x05 (StepGen)
hm2/hm2_soc_ol: Secondary Unit: 0x04
hm2/hm2_soc_ol: Secondary Pin: 0x81 (Step, Output)
hm2/hm2_soc_ol: pin 22:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x05 (StepGen)
hm2/hm2_soc_ol: Secondary Unit: 0x05
hm2/hm2_soc_ol: Secondary Pin: 0x82 (Direction, Output)
hm2/hm2_soc_ol: pin 23:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x05 (StepGen)
hm2/hm2_soc_ol: Secondary Unit: 0x05
hm2/hm2_soc_ol: Secondary Pin: 0x81 (Step, Output)
hm2/hm2_soc_ol: pin 24:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x05 (StepGen)
hm2/hm2_soc_ol: Secondary Unit: 0x06
hm2/hm2_soc_ol: Secondary Pin: 0x82 (Direction, Output)
hm2/hm2_soc_ol: pin 25:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x05 (StepGen)
hm2/hm2_soc_ol: Secondary Unit: 0x06
hm2/hm2_soc_ol: Secondary Pin: 0x81 (Step, Output)
hm2/hm2_soc_ol: pin 26:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x05 (StepGen)
hm2/hm2_soc_ol: Secondary Unit: 0x07
hm2/hm2_soc_ol: Secondary Pin: 0x82 (Direction, Output)
hm2/hm2_soc_ol: pin 27:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x05 (StepGen)
hm2/hm2_soc_ol: Secondary Unit: 0x07
hm2/hm2_soc_ol: Secondary Pin: 0x81 (Step, Output)
hm2/hm2_soc_ol: pin 28:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: pin 29:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x04 (Encoder)
hm2/hm2_soc_ol: Secondary Unit: 0x01
hm2/hm2_soc_ol: Secondary Pin: 0x01 (A, Input)
hm2/hm2_soc_ol: pin 30:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x04 (Encoder)
hm2/hm2_soc_ol: Secondary Unit: 0x01
hm2/hm2_soc_ol: Secondary Pin: 0x02 (B, Input)
hm2/hm2_soc_ol: pin 31:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Secondary Tag: 0x04 (Encoder)
hm2/hm2_soc_ol: Secondary Unit: 0x01
hm2/hm2_soc_ol: Secondary Pin: 0x03 (Index, Input)
hm2/hm2_soc_ol: pin 32:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: pin 33:
hm2/hm2_soc_ol: Primary Tag: 0x03 (IOPort)
hm2/hm2_soc_ol: Smart Serial Firmware Version 43
hm2/hm2_soc_ol: 34 I/O Pins used:
hm2/hm2_soc_ol: IO Pin 000 (GPIO0.P1-01): IOPort
hm2/hm2_soc_ol: IO Pin 001 (GPIO0.P1-14): IOPort
hm2/hm2_soc_ol: IO Pin 002 (GPIO0.P1-02): IOPort
hm2/hm2_soc_ol: IO Pin 003 (GPIO0.P1-15): IOPort
hm2/hm2_soc_ol: IO Pin 004 (GPIO0.P1-03): StepGen #0, pin Direction (Output)
hm2/hm2_soc_ol: IO Pin 005 (GPIO0.P1-16): StepGen #0, pin Step (Output)
hm2/hm2_soc_ol: IO Pin 006 (GPIO0.P1-04): StepGen #1, pin Direction (Output)
hm2/hm2_soc_ol: IO Pin 007 (GPIO0.P1-17): StepGen #1, pin Step (Output)
hm2/hm2_soc_ol: IO Pin 008 (GPIO0.P1-05): StepGen #2, pin Direction (Output)
hm2/hm2_soc_ol: IO Pin 009 (GPIO0.P1-06): StepGen #2, pin Step (Output)
hm2/hm2_soc_ol: IO Pin 010 (GPIO0.P1-07): StepGen #3, pin Direction (Output)
hm2/hm2_soc_ol: IO Pin 011 (GPIO0.P1-08): StepGen #3, pin Step (Output)
hm2/hm2_soc_ol: IO Pin 012 (GPIO0.P1-09): Hostmot2 DPLL #0, pin Ref Out Pin (Output)
hm2/hm2_soc_ol: IO Pin 013 (GPIO0.P1-10): Encoder #0, pin A (Input)
hm2/hm2_soc_ol: IO Pin 014 (GPIO0.P1-11): Encoder #0, pin B (Input)
hm2/hm2_soc_ol: IO Pin 015 (GPIO0.P1-12): Encoder #0, pin Index (Input)
hm2/hm2_soc_ol: IO Pin 016 (GPIO0.P1-13): IOPort
hm2/hm2_soc_ol: IO Pin 017 (GPIO0.P2-01): PWMGen #0, pin Out0 (PWM or Up) (Output)
hm2/hm2_soc_ol: IO Pin 018 (GPIO0.P2-14): PWMGen #1, pin Out0 (PWM or Up) (Output)
hm2/hm2_soc_ol: IO Pin 019 (GPIO0.P2-02): PWMGen #2, pin Out0 (PWM or Up) (Output)
hm2/hm2_soc_ol: IO Pin 020 (GPIO0.P2-15): StepGen #4, pin Direction (Output)
hm2/hm2_soc_ol: IO Pin 021 (GPIO0.P2-03): StepGen #4, pin Step (Output)
hm2/hm2_soc_ol: IO Pin 022 (GPIO0.P2-16): StepGen #5, pin Direction (Output)
hm2/hm2_soc_ol: IO Pin 023 (GPIO0.P2-04): StepGen #5, pin Step (Output)
hm2/hm2_soc_ol: IO Pin 024 (GPIO0.P2-17): StepGen #6, pin Direction (Output)
hm2/hm2_soc_ol: IO Pin 025 (GPIO0.P2-05): StepGen #6, pin Step (Output)
hm2/hm2_soc_ol: IO Pin 026 (GPIO0.P2-06): StepGen #7, pin Direction (Output)
hm2/hm2_soc_ol: IO Pin 027 (GPIO0.P2-07): StepGen #7, pin Step (Output)
hm2/hm2_soc_ol: IO Pin 028 (GPIO0.P2-08): IOPort
hm2/hm2_soc_ol: IO Pin 029 (GPIO0.P2-09): Encoder #1, pin A (Input)
hm2/hm2_soc_ol: IO Pin 030 (GPIO0.P2-10): Encoder #1, pin B (Input)
hm2/hm2_soc_ol: IO Pin 031 (GPIO0.P2-11): Encoder #1, pin Index (Input)
hm2/hm2_soc_ol: IO Pin 032 (GPIO0.P2-12): IOPort
hm2/hm2_soc_ol: IO Pin 033 (GPIO0.P2-13): IOPort
hm2/hm2_soc_ol: registered
DUMMY DISPLAY MODULE, press to continue.

Please Log in or Create an account to join the conversation.

More
25 Aug 2026 22:41 #349017 by PCW
If the driver does not find a Sserial remote, it reverts the pins to GPIO
so that's expected if there is no remote connected/discovered.

Please Log in or Create an account to join the conversation.

More
26 Aug 2026 07:48 - 26 Aug 2026 07:49 #349020 by murdemon
Replied by murdemon on topic Xilinx Zynq 7010 fpga crypto windfall boards
It all working now. Have to change tri-state block in vivad. Will be update on cloud project Vivado and so on
Attachments:
Last edit: 26 Aug 2026 07:49 by murdemon.
The following user(s) said Thank You: meister

Please Log in or Create an account to join the conversation.

More
26 Aug 2026 07:49 #349022 by meister
Replied by meister on topic Xilinx Zynq 7010 fpga crypto windfall boards
nice, it's time to build an addon board with IO's :)

Please Log in or Create an account to join the conversation.

More
27 Aug 2026 09:07 #349037 by murdemon
Replied by murdemon on topic Xilinx Zynq 7010 fpga crypto windfall boards
In really already have IOs on stmbl drive , now add webui interface, all work on board 
The following user(s) said Thank You: meister

Please Log in or Create an account to join the conversation.

Moderators: PCWjmelson
Time to create page: 0.744 seconds
Powered by Kunena Forum