Successful stepconf user buys Mesa5i25 wants to use experience in pncconf. How??

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06 Feb 2019 23:17 #125889 by cmorley
So after you figure out what the 5I25 is flashed to and set pncconf to that firmware..

Some things I would suggest, since you are not using any sserial daughter boards - is on the mesa configuration tab set the smart serial ports to 0 before pressing the accept component changes button.
This will eliminate the unneeded SmartSerial tabs from showing up.

Also setting the step generators to just the amount you need will free up pins for GPIO.

pin component numbers as you have discovered arn't the same as the connector pin numbers.
The component numbers map well when using daughter boards but not so when using bare connectors.
But the physical layout in pncconf does make some sense on the connector.
eg on connector 3 I/O tab the component (with a 7i76 firmware it's step gen 0 -direcction) on the top left is pin1 on connector 3 of the 5i25.
Under that in pin 2 (step gen 0 direction pin) etc.
When you get to the bottom of the page it continues on the right side.

Hope that helps a bit

Chris M

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06 Feb 2019 23:33 - 06 Feb 2019 23:38 #125891 by PCW

A lot of CNC operators declare Tormach's PathPilot just what the doctor ordered from an operator's standpoint. But when booted, it will insist that the Mesa card it finds be configured for a "standard" Tormach firmware.

Have you an idea about how to go about letting PathPilot and the 5i25 believe they are talking to a Tormach model and "fixing" the wiring to match what the 5i25 expects?

Can the necessary information be found as simply as reading the PIN file, if it exists, for the "Tormach standard firmware" after it is installed?


I think most people running Pathpilot on non-Tormach hardware (like Novakons) change the startup script
or change the bitfile out from under the script so they can use an appropriate configuration for their hardware.

Note that you would have to edit or create your own hal/ini files for a non-Tormach machine

You _can_ create a pinout file of current FPGA firmware with mesaflash:

sudo mesaflash --device 5i25 --readhmid > someoldpinout.txt
Last edit: 06 Feb 2019 23:38 by PCW.

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07 Feb 2019 17:17 - 07 Feb 2019 18:12 #125934 by clunc
Chris,

Yes, that helps. There's also a serious oil-on-troubled-waters effect when the author of pncconf looks in on your post. ;o)

Peter,

> I think most people running Pathpilot on non-Tormach hardware (like Novakons) change the startup script
or change the bitfile out from under the script so they can use an appropriate configuration for their hardware.

Yes, I've come to the conclusion that the approach to "Let PathPilot and a Tormach-flashed Mesa 5i25 believe that there is a real, live Tormach machine at the end of the chain--by merely (used ironically) rewiring the non-Tormach's controller to meet the 5i25's expectations" is Madness, Pure and Simple. The concern was that "Customizing" PP or 5i25 config files will require maintenance downstream as new PP versions come out. However, no amount of "rewiring" is going to change a non-Tormach spindle of Type Whatever to something that will respond to signals for a Tormach spindle of Type SomethingElseIndeed.

Q. Does linuxcnc have a mechanism for applying "customizations", from separate file(s), over-riding "stock" INI/HAL files?
(Although that won't help if the Mesa firmware is incompatible with downstream hardware to begin with.)

[EDIT: as I consider this, I think the sane approach is to "Let PathPilot behave normally--but edit its startup script, /home/operator/operator_login to skip the Mesa firmware check" (which shuts down the machine if unsatisfied!) AND "Let the CNC Controller behave normally" and concentrate on, as has been recommended a number of times already, "finding a 5i25 variant that 'looks close' and concentrating on its perfection, tweaking it possibly for new versions of PP and machine modifications. I guess that's known as "middleware."]

> sudo mesaflash --device 5i25 --readhmid > someoldpinout.txt

I take it this queries the installed card.
Q. Is there something similar to get PIN info out of BIT files?
I ask because I have to do a lot of my background research away from the machine, but I have noticed that the PIN file contents are included verbatim in the HAL file, at least the one generated for me when the 5i25 firmware was flashed by PathPilot.
Last edit: 07 Feb 2019 18:12 by clunc.

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07 Feb 2019 18:09 - 07 Feb 2019 18:10 #125937 by clunc
BTW, attached is a file of my results for "finding something close" among the firmware PIN files to choose from among those provided by the 5i25_support-software.zip downloaded from mesanet.com.

% cd 5i25/configs/hostmot2/
% ls [5a-z]*pin [NB I'm not interested in 7iNN daughterboard configs]

File Attachment:

File Name: p3_firmwar...ates.txt
File Size:14 KB

File Attachment:

File Name: find_firmw...h.sh.txt
File Size:3 KB


I created a set of files from commands similar to this one:
grep -E "^ 3\s*4 " 5i25_[5a-z]*pin|grep " Dir " > p3_pin03_dir_out
for all pins 1 through 17 and then cat'd|sort'd the resulting files into the one attached, so I can see, in one place, which firmwares have "all the pins I need" and simultaneously if "those pins are of the type and in the directions too."

Later readers will need to modify the egrep commands to meet the needs of their CNC controller's pins. In my case, I don't have a(ny) daughterboards, so excluded "7i" boards from the search. Too, I also eliminated lines with pins of wrong type or direction with a second grep.

[Edit: attached also is the complete list of 17 grep lines I used, saving some typing possibly for a future visitor.]
Attachments:
Last edit: 07 Feb 2019 18:10 by clunc.

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07 Feb 2019 19:31 - 07 Feb 2019 19:37 #125944 by clunc
After all that work, I think the Very First firmware pin file is the best match, for my interpretation of the controller's requirements. :^p
Following, in bold, are pins that are not what I see as exact matches.

Q. At this point do I copy and edit a new PIN file to match perfectly, somehow, and from that make a new BIT file, somehow?
===========================
Pin Name from JP-3163B controller schematic
1 Spindle PWM
2 X-axis Step
3 X-axis Dir
4 Y-axis Step
5 Y-axis Dir
6 Z-axis Step
7 Z-axis Dir
8 A-axis Step Available--don't have an A-axis
9 A-axis Dir Available--don't have an A-axis
10 ToolHgt Guessing a touch-plate, so In
11 X-limit In
12 Y-limit In
13 Z-limit In
14 Enable Relay 2 Sounds like an Out
15 Emergency Stop Guessing an Out
16 N/C Available
17 SpindlePWM 0-10V
===========================
# OBJECTION: 5ABOBx2: p11,p12,p13 quad inputs, not simple
# OBJECTION: 5ABOBx2: p16 don't need StepGen, N/C
# OBJECTION: 5ABOBx2: p17 want PWM, SpindlePWM 0-10V
5i25_5ABOBx2.pin: 1 0 IOPort PWMGen 0 PWM (Out)
5i25_5ABOBx2.pin: 2 2 IOPort StepGen 0 Step (Out)
5i25_5ABOBx2.pin: 3 4 IOPort StepGen 0 Dir (Out)
5i25_5ABOBx2.pin: 4 6 IOPort StepGen 1 Step (Out)
5i25_5ABOBx2.pin: 5 8 IOPort StepGen 1 Dir (Out)
5i25_5ABOBx2.pin: 6 9 IOPort StepGen 2 Step (Out)
5i25_5ABOBx2.pin: 7 10 IOPort StepGen 2 Dir (Out)
5i25_5ABOBx2.pin: 8 11 IOPort StepGen 3 Step (Out)
5i25_5ABOBx2.pin: 9 12 IOPort StepGen 3 Dir (Out)
5i25_5ABOBx2.pin:10 13 IOPort None [Action: nothing. GPIO pin defaults to (In)]
5i25_5ABOBx2.pin:11 14 IOPort QCount 0 Quad-A (In) [Action: change to GPIO]
5i25_5ABOBx2.pin:12 15 IOPort QCount 0 Quad-B (In) [ditto]
5i25_5ABOBx2.pin:13 16 IOPort QCount 0 Quad-IDX (In) [ditto]
5i25_5ABOBx2.pin:14 1 IOPort None [Action: configure as (Out) in HAL file]
5i25_5ABOBx2.pin:15 3 IOPort None [ditto]
5i25_5ABOBx2.pin:16 5 IOPort StepGen 8 Step (Out) [Action: change to GPIO, just to clean up]
5i25_5ABOBx2.pin:17 7 IOPort StepGen 8 Dir (Out) [Action: change to PWM]
Last edit: 07 Feb 2019 19:37 by clunc. Reason: add proposed Actions

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07 Feb 2019 20:00 #125949 by clunc
Here's the edited version, 5i25_5ABOB1x2_mod.pin.
* all P2 pins set to GPIO [unnec., done just for a clean look]
* P3 11.12,13 set to GPIO, default to (In) for 3 limit switches
* P3 16 set to GPIO [unnec., clean look again]
* P3 17 set to PWM
* corrected numbers of Modules (e.g., IOPort,StepGen,PWMgen,QCount) affected by the foregoing changes
* Timer and Register lines left alone
Configuration Name: HOSTMOT2

General configuration information:

  BoardName : MESA5I25
  FPGA Size: 9 KGates
  FPGA Pins: 144
  Number of IO Ports: 2
  Width of one I/O port: 17
  Clock Low frequency: 33.3333 MHz
  Clock High frequency: 200.0000 MHz
  IDROM Type: 3
  Instance Stride 0: 4
  Instance Stride 1: 64
  Register Stride 0: 256
  Register Stride 1: 256
  IDROM Type: 3

Modules in configuration:

  Module: WatchDog
  There are 1 of WatchDog in configuration
  Version: 0
  Registers: 3
  BaseAddress: 0C00
  ClockFrequency: 33.333 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: IOPort
  There are 2 of IOPort in configuration
  Version: 0
  Registers: 5
  BaseAddress: 1000
  ClockFrequency: 33.333 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: QCount
  There are 0 of QCount in configuration
  Version: 0
  Registers: 5
  BaseAddress: 3000
  ClockFrequency: 33.333 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: StepGen
  There are 8 of StepGen in configuration
  Version: 2
  Registers: 10
  BaseAddress: 2000
  ClockFrequency: 33.333 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes
  Module: PWMGen
  There are 2 of PWMGen in configuration
  Version: 0
  Registers: 5
  BaseAddress: 4100
  ClockFrequency: 200.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: LED
  There are 1 of LED in configuration
  Version: 0
  Registers: 1
  BaseAddress: 0200
  ClockFrequency: 33.333 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

Configuration pin-out:

IO Connections for P3
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 1      0   IOPort       PWMGen           0        PWM             (Out)
14      1   IOPort       None
 2      2   IOPort       StepGen          0        Step            (Out)
15      3   IOPort       None
 3      4   IOPort       StepGen          0        Dir             (Out)
16      5   IOPort       None
 4      6   IOPort       StepGen          1        Step            (Out)
17      7   IOPort       PWMGen           1        PWM             (Out)
 5      8   IOPort       StepGen          1        Dir             (Out)
 6      9   IOPort       StepGen          2        Step            (Out)
 7     10   IOPort       StepGen          2        Dir             (Out)
 8     11   IOPort       StepGen          3        Step            (Out)
 9     12   IOPort       StepGen          3        Dir             (Out)
10     13   IOPort       None
11     14   IOPort       None
12     15   IOPort       None
13     16   IOPort       None

IO Connections for P2
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 1     17   IOPort       None
14     18   IOPort       None
 2     19   IOPort       None
15     20   IOPort       None
 3     21   IOPort       None
16     22   IOPort       None
 4     23   IOPort       None
17     24   IOPort       None
 5     25   IOPort       None
 6     26   IOPort       None
 7     27   IOPort       None
 8     28   IOPort       None
 9     29   IOPort       None
10     30   IOPort       None
11     31   IOPort       None
12     32   IOPort       None
13     33   IOPort       None

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07 Feb 2019 20:10 #125950 by PCW
So that bit file would work as-is except for the PWM

It might be that you can use software PWM on pin 17 if the filter on your breakout is slow enough

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07 Feb 2019 23:18 #125960 by clunc

So that bit file would work as-is except for the PWM


That goes back to your earlier comment that a pin can be "disabled" and it will revert to a GPIO pin? (all of which, save pin17, are of that type)

I'm not sophisticated enough, or dumb-lucky enough, to rely on the slowness of a filter. I really need to put a PWMgen on pin 17, for the sake of future transparency too.

"I thought I saw" (old age) that a BIT file could be generated from a PIN (or other text) file, but the only reference I see now is to a sophisticated use of Xilinx (FPGA) "ISE Design Suite". (A PIN-to-BIT parser would have to be pretty sophisticated too I guess.) Is that the only way?

Thank you.

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08 Feb 2019 00:36 - 08 Feb 2019 00:37 #125966 by PCW

That goes back to your earlier comment that a pin can be "disabled" and it will revert to a GPIO pin? (all of which, save pin17, are of that type)


Yes, any pin that has no enabled special function reverts to GPIO
Special inputs (like encoder inputs) do not interfere with using the pins as
GP inputs even if enabled, but you cannot change them to outputs unless
you disable the special function.


I'm not sophisticated enough, or dumb-lucky enough, to rely on the slowness of a filter. I really need to put a PWMgen on pin 17, for the sake of future transparency too.


If software PWM worked on your stepconf created configuration, it will also work on the 5I25, though it might require a base thread


"I thought I saw" (old age) that a BIT file could be generated from a PIN (or other text) file, but the only reference I see now is to a sophisticated use of Xilinx (FPGA) "ISE Design Suite". (A PIN-to-BIT parser would have to be pretty sophisticated too I guess.) Is that the only way?


Yes, recompiling the bit file is the only way to change a special function pinout or types/numbers of included modules

freeby.mesanet.com/5i25_jp3163x2d.bit
Last edit: 08 Feb 2019 00:37 by PCW.

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09 Feb 2019 03:45 #126033 by clunc
Whoa!!! This looks like the Gold Buzzer!

I never even thought a firmware already customized for the JP-3153B might exist, so never looked!

[Unfortunately, when I just searched, nothing came back, and freeby.mesanet.com/ was not a list of files I expected.]

I'm really looking forward to flashing this. Thank you.

I understand that this will make the 5i25 and the JP-3163B controller understand each other, and my task is now reduced to assuring that the INI and HAL files underlying PathPilot assure a similar understanding between PP and the Mesa.

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