Pimping the mini-lathe

RotarySMP
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20 Jul 2020 10:27 #175233 by RotarySMP

Replied by RotarySMP on topic Pimping the mini-lathe

Yep. I try not to copy his comedic chop's, because he's unique. But the basic concept of showing the project and not putting you own ugly mug in front of the camera is a good one, when you have a face made for radio, like me

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tommylight
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20 Jul 2020 10:48 #175241 by tommylight

Replied by tommylight on topic Pimping the mini-lathe

RotarySMP wrote:
...... when you have a face made for radio, like me

LOL, same here.
He does have one single video where he is full frontal.

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23 Jul 2020 09:42 #175486 by RotarySMP

Replied by RotarySMP on topic Pimping the mini-lathe

Some eagle eyed veiwers were not yet asleep at 10:10 of the last video, and picked up that PNCConf reset the PWM = 1 --> PWM =0 as soon as I exited that field. I have since tried it a few times and it seems like a bug ( or more likely a simplification) in PNCConf, as with the default firmware, there are no PWM available.

I assume I'll just have to edit the PWM manually into the HAL.

I read that the 1 PWM config of the 7i96 normally assigns it instead of Step/Dir 4 to TB2 pin 1-6. Is the PWM signal output between GND and STEP4+, between GND nd DIR4+, or between STEP4+ and DIR4+?

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PCW
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23 Jul 2020 14:01 - 23 Jul 2020 14:04 #175545 by PCW

Replied by PCW on topic Pimping the mini-lathe

if you use the latest mesaflash:

github.com/LinuxCNC/mesaflash

you can list the terminal connections by using the --readhmid option:

mesaflash --device 7i96 --addr 10.10.10.10 --readhmid

For example, using the 7i96d_1pwm firmware, you get this listing:

Configuration Name: HOSTMOT2

General configuration information:

  BoardName : MESA7I96
  FPGA Size: 9 KGates
  FPGA Pins: 144
  Number of IO Ports: 3
  Width of one I/O port: 17
  Clock Low frequency: 100.0000 MHz
  Clock High frequency: 200.0000 MHz
  IDROM Type: 3
  Instance Stride 0: 4
  Instance Stride 1: 64
  Register Stride 0: 256
  Register Stride 1: 256

Modules in configuration:

  Module: DPLL
  There are 1 of DPLL in configuration
  Version: 0
  Registers: 7
  BaseAddress: 7000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: WatchDog
  There are 1 of WatchDog in configuration
  Version: 0
  Registers: 3
  BaseAddress: 0C00
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: IOPort
  There are 3 of IOPort in configuration
  Version: 0
  Registers: 5
  BaseAddress: 1000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: PWM
  There are 1 of PWM in configuration
  Version: 0
  Registers: 5
  BaseAddress: 4100
  ClockFrequency: 200.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: StepGen
  There are 4 of StepGen in configuration
  Version: 2
  Registers: 10
  BaseAddress: 2000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: QCount
  There are 1 of QCount in configuration
  Version: 2
  Registers: 5
  BaseAddress: 3000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: SSerial
  There are 1 of SSerial in configuration
  Version: 0
  Registers: 6
  BaseAddress: 5B00
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 64 bytes

  Module: SSR
  There are 1 of SSR in configuration
  Version: 0
  Registers: 2
  BaseAddress: 7D00
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: LED
  There are 1 of LED in configuration
  Version: 0
  Registers: 1
  BaseAddress: 0200
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

Configuration pin-out:

IO Connections for TB3
Pin#                  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

TB3 1                   0   IOPort       None           
TB3 2                   1   IOPort       None           
TB3 3                   2   IOPort       None           
TB3 4                   3   IOPort       None           
TB3 5                   4   IOPort       None           
TB3 6                   5   IOPort       None           
TB3 7                   6   IOPort       None           
TB3 8                   7   IOPort       None           
TB3 9                   8   IOPort       None           
TB3 10                  9   IOPort       None           
Internal               10   IOPort       None           
TB3 13,14              11   IOPort       SSR              0        Out-00          (Out)
TB3 15,16              12   IOPort       SSR              0        Out-01          (Out)
TB3 17,18              13   IOPort       SSR              0        Out-02          (Out)
TB3 19,20              14   IOPort       SSR              0        Out-03          (Out)
TB3 21,22              15   IOPort       SSR              0        Out-04          (Out)
TB3 23,24              16   IOPort       SSR              0        Out-05          (Out)

IO Connections for TB1/TB2
Pin#                  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

TB1 2,3                17   IOPort       StepGen          0        Step/Table1     (Out)
TB1 4,5                18   IOPort       StepGen          0        Dir/Table2      (Out)
TB1 8,9                19   IOPort       StepGen          1        Step/Table1     (Out)
TB1 10,11              20   IOPort       StepGen          1        Dir/Table2      (Out)
TB1 14,15              21   IOPort       StepGen          2        Step/Table1     (Out)
TB1 16,17              22   IOPort       StepGen          2        Dir/Table2      (Out)
TB1 20,21              23   IOPort       StepGen          3        Step/Table1     (Out)
TB1 22,23              24   IOPort       StepGen          3        Dir/Table2      (Out)
TB2 2,3                25   IOPort       PWM              0        PWM             (Out)
TB2 4,5                26   IOPort       PWM              0        Dir             (Out)
TB2 7,8                27   IOPort       QCount           0        Quad-A          (In)
TB2 10,11              28   IOPort       QCount           0        Quad-B          (In)
TB2 13,14              29   IOPort       QCount           0        Quad-IDX        (In)
TB2 16,17              30   IOPort       SSerial          0        RXData0         (In)
TB2 18,19              31   IOPort       SSerial          0        TXData0         (Out)
Internal               32   IOPort       SSerial          0        TXEn0           (Out)
Internal               33   IOPort       SSR              0        AC Ref          (Out)

IO Connections for P1
Pin#                  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 1                     34   IOPort       None           
14                     35   IOPort       None           
 2                     36   IOPort       None           
15                     37   IOPort       None           
 3                     38   IOPort       None           
16                     39   IOPort       None           
 4                     40   IOPort       None           
17                     41   IOPort       None           
 5                     42   IOPort       None           
 6                     43   IOPort       None           
 7                     44   IOPort       None           
 8                     45   IOPort       None           
 9                     46   IOPort       None           
10                     47   IOPort       None           
11                     48   IOPort       None           
12                     49   IOPort       None           
13                     50   IOPort       None

Last edit: 23 Jul 2020 14:04 by PCW.

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RotarySMP
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23 Jul 2020 14:04 #175546 by RotarySMP

Replied by RotarySMP on topic Pimping the mini-lathe

Another 7i96 config question, in addition to the one in the last post...

Do I have to use only the new MESA naming convention in HAL generated by the new PNCConf.

[HMOT](card0)...

or are these just place holders, and I have to modify each instance to the syntax used by HALshow?

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PCW
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23 Jul 2020 14:13 - 23 Jul 2020 14:16 #175547 by PCW

Replied by PCW on topic Pimping the mini-lathe

That is just a way to have the card name in one place (in the ini file):

[HMOT]
# **** This is for info only ****
CARD0=hm2_7i96.0

in the hal file
hm2_7i96.0.xxxxxxxx
is the same as
[HMOT](card0).xxxxxxxx

if the ini file [HMOT] entry is CARD0=hm2_7i96.0

Last edit: 23 Jul 2020 14:16 by PCW.

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RotarySMP
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23 Jul 2020 14:48 - 23 Jul 2020 14:51 #175551 by RotarySMP

Replied by RotarySMP on topic Pimping the mini-lathe

Thanks for the prompt replies. Now I can continue wiring up the VFD and configure it.

in the hal file
hm2_7i96.0.xxxxxxxx
is the same as
[HMOT](card0).xxxxxxxx

Replacing 10 characters with 13 characters doen't seem like a benefit, what is the advantage of this?
Mark

Last edit: 23 Jul 2020 14:51 by RotarySMP.

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tommylight
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23 Jul 2020 14:57 #175552 by tommylight

Replied by tommylight on topic Pimping the mini-lathe

RotarySMP wrote:
Replacing 10 characters with 13 characters doen't seem like a benefit, what is the advantage of this?

Make a config for say 5i25 and later want to use that same config for 7i92, now requires only changing the card name in the ini file and adding the IP address in the hal file.
Without this option it would require a lot of "search and replace" for everything referring to 5i25 in hal.

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PCW
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23 Jul 2020 15:25 #175553 by PCW

Replied by PCW on topic Pimping the mini-lathe

It also can allow you to use the same hal file for different cards

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RotarySMP
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26 Jul 2020 09:49 - 26 Jul 2020 09:50 #175878 by RotarySMP

Replied by RotarySMP on topic Pimping the mini-lathe

I havent made enough progress to merit editing a video this week. Sorry about that.

I installed mesaflash and read out the card. WIth only two step gens, one encoder and one pwmgen, it looks like this...

minilathe@minilathe:~$ sudo apt install git
[sudo] password for minilathe:          

minilathe@minilathe:~/mesaflash$ mesaflash --device 7i96 --addr 10.10.10.10 --readhmid
Configuration Name: HOSTMOT2

General configuration information:

  BoardName : MESA7I96
  FPGA Size: 9 KGates
  FPGA Pins: 144
  Number of IO Ports: 3
  Width of one I/O port: 17
  Clock Low frequency: 100.0000 MHz
  Clock High frequency: 200.0000 MHz
  IDROM Type: 3
  Instance Stride 0: 4
  Instance Stride 1: 64
  Register Stride 0: 256
  Register Stride 1: 256

Modules in configuration:

  Module: DPLL
  There are 1 of DPLL in configuration
  Version: 0
  Registers: 7
  BaseAddress: 7000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: WatchDog
  There are 1 of WatchDog in configuration
  Version: 0
  Registers: 3
  BaseAddress: 0C00
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: IOPort
  There are 3 of IOPort in configuration
  Version: 0
  Registers: 5
  BaseAddress: 1000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: PWM
  There are 1 of PWM in configuration
  Version: 0
  Registers: 5
  BaseAddress: 4100
  ClockFrequency: 200.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: StepGen
  There are 4 of StepGen in configuration
  Version: 2
  Registers: 10
  BaseAddress: 2000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: QCount
  There are 1 of QCount in configuration
  Version: 2
  Registers: 5
  BaseAddress: 3000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: SSerial
  There are 1 of SSerial in configuration
  Version: 0
  Registers: 6
  BaseAddress: 5B00
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 64 bytes

  Module: Transformer
  There are 1 of Transformer in configuration
  Version: 0
  Registers: 2
  BaseAddress: 7D00
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: LED
  There are 1 of LED in configuration
  Version: 0
  Registers: 1
  BaseAddress: 0200
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

Configuration pin-out:

IO Connections for P1
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 1      0   IOPort       None           
14      1   IOPort       None           
 2      2   IOPort       None           
15      3   IOPort       None           
 3      4   IOPort       None           
16      5   IOPort       None           
 4      6   IOPort       None           
17      7   IOPort       None           
 5      8   IOPort       None           
 6      9   IOPort       None           
 7     10   IOPort       None           
 8     11   IOPort       Transformer      0        Drive           (Out)
 9     12   IOPort       Transformer      0        Ref             (Out)
10     13   IOPort       Transformer      0        Null3           (Out)
11     14   IOPort       Transformer      0        Null4           (Out)
12     15   IOPort       Transformer      0        Null5           (Out)
13     16   IOPort       Transformer      0        Null6           (Out)

IO Connections for TB1
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 1     17   IOPort       StepGen          0        Step/Table1     (Out)
14     18   IOPort       StepGen          0        Dir/Table2      (Out)
 2     19   IOPort       StepGen          1        Step/Table1     (Out)
15     20   IOPort       StepGen          1        Dir/Table2      (Out)
 3     21   IOPort       StepGen          2        Step/Table1     (Out)
16     22   IOPort       StepGen          2        Dir/Table2      (Out)
 4     23   IOPort       StepGen          3        Step/Table1     (Out)
17     24   IOPort       StepGen          3        Dir/Table2      (Out)
 5     25   IOPort       PWM              0        PWM             (Out)
 6     26   IOPort       PWM              0        Dir             (Out)
 7     27   IOPort       QCount           0        Quad-A          (In)
 8     28   IOPort       QCount           0        Quad-B          (In)
 9     29   IOPort       QCount           0        Quad-IDX        (In)
10     30   IOPort       SSerial          0        RXData1         (In)
11     31   IOPort       SSerial          0        TXData1         (Out)
12     32   IOPort       SSerial          0        TXEn1           (Out)
Segmentation fault (core dumped)
minilathe@minilathe:~/mesaflash$

So I need to connect the PWM to analog card to TB1 pins 5 and 6. Does it matter which is GND and which is signal?

Last edit: 26 Jul 2020 09:50 by RotarySMP.

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