Secondary spindle on 7i76e

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24 Apr 2019 19:52 #131792 by tecno
Replied by tecno on topic Secondary spindle on 7i76e
I will take a look tomorrow and see what pins are there.

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25 Apr 2019 12:29 #131845 by tecno
Replied by tecno on topic Secondary spindle on 7i76e

andypugh wrote: I seem to be confusing my threads. I was under the impression that this was a simple on/off spindle, but reading back it isn't.

Your BoB on the second connector needs a PWM. Does your current firmware put that on the right pin?


Nothing on P2 ;)

File Attachment:

File Name: combimill.txt
File Size:5 KB


The BOB has PWM on pin 1 and on/off on pin 17

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25 Apr 2019 14:29 #131857 by andypugh
Replied by andypugh on topic Secondary spindle on 7i76e
It looks like the bit-file "7i76e_7i76x1_bstechx2d.bit" has a handy PWM on Pin 1 of the expansion connectors.

So, if you use Mesaflash to upload that bitfile to the 7i76E you should then have a pwmgen available to drive the secodary spindle.

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25 Apr 2019 14:54 #131858 by tecno
Replied by tecno on topic Secondary spindle on 7i76e
But there is also 7i85 connected.


How can I check what BIT file is flashed on the board now?


File Attachment:

File Name: verbose.txt
File Size:1 KB
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25 Apr 2019 14:59 #131859 by andypugh
Replied by andypugh on topic Secondary spindle on 7i76e
If you need 7i85 + Generic BoB then you probably need a custom bitfile.

You can't really tell what bitfile is flashed, but you can get a read-out of what is currently in there, and match it to the PINxxxxxx.vhd files.

7i76 + 7i85 seems like an awful lot of IO pins?

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25 Apr 2019 15:13 #131860 by tecno
Replied by tecno on topic Secondary spindle on 7i76e
From this?
onfiguration Name: HOSTMOT2

General configuration information:

  BoardName : MESA7I76
  FPGA Size: 16 KGates
  FPGA Pins: 256
  Number of IO Ports: 3
  Width of one I/O port: 17
  Clock Low frequency: 100.0000 MHz
  Clock High frequency: 200.0000 MHz
  IDROM Type: 3
  Instance Stride 0: 4
  Instance Stride 1: 64
  Register Stride 0: 256
  Register Stride 1: 256

Modules in configuration:

  Module: DPLL
  There are 1 of DPLL in configuration
  Version: 0
  Registers: 7
  BaseAddress: 7000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: WatchDog
  There are 1 of WatchDog in configuration
  Version: 0
  Registers: 3
  BaseAddress: 0C00
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: IOPort
  There are 3 of IOPort in configuration
  Version: 0
  Registers: 5
  BaseAddress: 1000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: StepGen
  There are 5 of StepGen in configuration
  Version: 2
  Registers: 10
  BaseAddress: 2000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: MuxedQCount
  There are 6 of MuxedQCount in configuration
  Version: 3
  Registers: 5
  BaseAddress: 3600
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: MuxedQCountSel
  There are 1 of MuxedQCountSel in configuration
  Version: 0
  Registers: 0
  BaseAddress: 0000
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

  Module: SSerial
  There are 1 of SSerial in configuration
  Version: 0
  Registers: 6
  BaseAddress: 5B00
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 64 bytes

  Module: LED
  There are 1 of LED in configuration
  Version: 0
  Registers: 1
  BaseAddress: 0200
  ClockFrequency: 100.000 MHz
  Register Stride: 256 bytes
  Instance Stride: 4 bytes

Configuration pin-out:

IO Connections for on-card
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 1      0   IOPort       StepGen          0        Dir/Table2      (Out)
14      1   IOPort       StepGen          0        Step/Table1     (Out)
 2      2   IOPort       StepGen          1        Dir/Table2      (Out)
15      3   IOPort       StepGen          1        Step/Table1     (Out)
 3      4   IOPort       StepGen          2        Dir/Table2      (Out)
16      5   IOPort       StepGen          2        Step/Table1     (Out)
 4      6   IOPort       StepGen          3        Dir/Table2      (Out)
17      7   IOPort       StepGen          3        Step/Table1     (Out)
 5      8   IOPort       StepGen          4        Dir/Table2      (Out)
 6      9   IOPort       StepGen          4        Step/Table1     (Out)
 7     10   IOPort       SSerial          0        TXData1         (Out)
 8     11   IOPort       SSerial          0        RXData1         (In)
 9     12   IOPort       SSerial          0        TXData2         (Out)
10     13   IOPort       SSerial          0        RXData2         (In)
11     14   IOPort       MuxedQCount      2        MuxQ-IDX        (In)
12     15   IOPort       MuxedQCount      2        MuxQ-B          (In)
13     16   IOPort       MuxedQCount      2        MuxQ-A          (In)

IO Connections for P1
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 1     17   IOPort       SSerial          0        RXData7         (In)
14     18   IOPort       SSerial          0        TXData7         (Out)
 2     19   IOPort       SSerial          0        RXData6         (In)
15     20   IOPort       SSerial          0        TXData6         (Out)
 3     21   IOPort       SSerial          0        RXData5         (In)
16     22   IOPort       SSerial          0        TXData5         (Out)
 4     23   IOPort       SSerial          0        RXData4         (In)
17     24   IOPort       SSerial          0        TXData4         (Out)
 5     25   IOPort       SSerial          0        RXData3         (In)
 6     26   IOPort       SSerial          0        TXData3         (Out)
 7     27   IOPort       MuxedQCountSel   0        MuxSel0         (Out)
 8     28   IOPort       MuxedQCount      0        MuxQ-A          (In)
 9     29   IOPort       MuxedQCount      0        MuxQ-B          (In)
10     30   IOPort       MuxedQCount      0        MuxQ-IDX        (In)
11     31   IOPort       MuxedQCount      1        MuxQ-A          (In)
12     32   IOPort       MuxedQCount      1        MuxQ-B          (In)
13     33   IOPort       MuxedQCount      1        MuxQ-IDX        (In)

IO Connections for P2
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 1     34   IOPort       None           
14     35   IOPort       None           
 2     36   IOPort       None           
15     37   IOPort       None           
 3     38   IOPort       None           
16     39   IOPort       None           
 4     40   IOPort       None           
17     41   IOPort       None           
 5     42   IOPort       None           
 6     43   IOPort       None           
 7     44   IOPort       None           
 8     45   IOPort       None           
 9     46   IOPort       None           
10     47   IOPort       None           
11     48   IOPort       None           
12     49   IOPort       None           
13     50   IOPort       None           

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25 Apr 2019 15:26 #131861 by andypugh
Replied by andypugh on topic Secondary spindle on 7i76e
That looks like PIN_7I76x1_7i85x1D_51.vhd

Maybe store.mesanet.com/index.php?route=produc...83_88&product_id=122 is the answer?

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25 Apr 2019 15:37 #131863 by tecno
Replied by tecno on topic Secondary spindle on 7i76e
7I76x1_7i85x_7i85sx1D maybe as I have the 7i85S board

So adding the 7i83 to the cocktail no need of other bit file?

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25 Apr 2019 16:34 #131865 by PCW
Replied by PCW on topic Secondary spindle on 7i76e
No, sserial add on cards do no require any firmware changes.

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25 Apr 2019 16:44 #131868 by tecno
Replied by tecno on topic Secondary spindle on 7i76e
OK.

How complicated would it be to write a new bit-file adding P2 with what I need?

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