New project, litehm2: a hostmot2 port to linsn rv901t

Hello, sir
The PWM circuit board of hm2_lite has only two pins: pwm.x.out and pwm.x.dir.
Can it be used to control the forward and reverse rotation of the servo motor and run in speed mode by analog voltage? With an encoder, can the xyz axis be controlled by pid?

There are at least three ways to generate a bipolar analog voltage from PWM


1. Using PWM/DIR (typically using an op-amp circuit that
is changed from inverting to non-inverting by a analog switch)
(this has the disadvantage of a glitch when direction changes)

2. Using the PWM generators UP/DOWN mode and summing
a positive and negative filtered voltage.
(this has the disadvantage that the filter time constant
varies with the input)

3. Using the PWM generators offset mode (so 0 = 50%) and an op-amp
filter that has a DC offset of - full scale
(This has the disadvantage that you lose 1 bit of resolution, which may not matter
if you use dithering)

Thank you for your answer. Wish you good luck

I didn't have a programmer at hand and found a very cheap option xilinx virtual cable. 
It flashes perfectly. You just need to solder another contact to the ground on the board.
TDI = 4, TDO = 5, TCK = 6, TMS = 7, GND
Author's page where you can download gitee.com/xiaowuzxc/ESP32-XVC
"Over-the-air" programming over ESP32-C3
For IMPACT ise configuration JTAG spartan 6 xc6slx16
Can also configure for programming in flash memory in impact
Your host can find out from any program for scanning the ip environment.On my phone WOM WIFI
For example IMPACT
xilinx_xvc host=host=192.168.0.103:2542 disableversioncheck=true

If there is no ISE Xilinx there is a standalone programmer openFPGALoader
For openFPGALoader configuration spartan 6 xc6slx16
Write-flash JTAG to SPI bridge  -f

sudo openFPGALoader -c xvc-client --ip <your ip> --port 2542 --fpga-part xc6slx16 -f <your bit file>

Write-sram JTAG  -m
sudo openFPGALoader -c xvc-client --ip <your ip> --port 2542 --fpga-part xc6slx16 -m <your bit file>

For example

sudo openFPGALoader -c xvc-client --ip 192.168.0.103 --port 2542 --fpga-part xc6slx16 -f rv901t_4out__3stepgen_2enc_1pwm.bit
sudo openFPGALoader -c xvc-client --ip 192.168.0.103 --port 2542 --fpga-part xc6slx16 -m rv901t_4out__3stepgen_2enc_1pwm.bit

/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////

sudo apt install git gzip libftdi1-2 libftdi1-dev libhidapi-dev libudev-dev zlib1g-dev cmake pkg-config make g++
  
git clone github.com/trabucayre/openFPGALoader
cd openFPGALoader
mkdir build
cd build
cmake .. 
cmake --build .
sudo make install

Hoping for some advice, things to check.
I have In rv901t board running,  correct firmware,  i disabled most os the mdb2hal stuff in hal to get it to run. I have modded the board as posted on this post, the j601 port works for outputs and tests well. However the j600 port isn't working as input. If i mod my hal file so one of the inputs (on the j600 port) is an output it works as one. ( setp ***** is_output true.  - or something like that) shouldn't the firmware be setting it as input?
edit # found the problem,  page 8 note that the bit file on github is not suited to a modded board. So use your own created bitfile or the page 8 one. 

SIR Could you advise how to implement the SSI encoder configuration in hostmot2.py for 901T module compatibility?