Advanced Search

Search Results (Searched for: )

  • meister
  • meister
11 Jul 2025 13:48
Replied by meister on topic Xilinx Zynq 7010 fpga crypto windfall boards

Xilinx Zynq 7010 fpga crypto windfall boards

Category: Driver Boards

but rio is much more than the bitfile generation, it creates the interfaces and linuxcnc configuration.

it would be nice to have a visual editor in rio-setup like the vivado block designer
  • Todd Zuercher
  • Todd Zuercher's Avatar
11 Jul 2025 13:30
Replied by Todd Zuercher on topic Weird rotary axis movement

Weird rotary axis movement

Category: General LinuxCNC Questions

It isn't that Linuxcnc doesn't do sychronized motion with rotoary axis. Rotary axis are sychronized just fine with linear. The problem is the incompatability of linear feed rate units with rotary feed rate units. The result is often (especially with inches) unexpectedly slow movements when a rotary move is mixed with a linear one. The problem is actually a G-code limitation, rather than a Linuxcnc one. For example you are milling along at F20 inches/min then you throw in a 40 degree move with the rotary. The rotary move is going to take 2 minutes to comple because of the F20, if the same line also includes a 1 inch move, the linear move will be limited to 0.5ipm so that it takes the same 2 minutes to complete. This is where the invers time mode comes to the rescue. it has no unit of measure involved just time. So if you want your 40deg 1inch combined move to move so that the linear component still moves at 20ipm you would specify F code on the line as 1/t or in this case 1/0.05min. or F20.0
  • PCW
  • PCW's Avatar
11 Jul 2025 13:15 - 11 Jul 2025 20:56
Replied by PCW on topic 5 axis milling machine with 7i96s

5 axis milling machine with 7i96s

Category: Driver Boards

You can add a daughter card to the 7I96S parallel expansion port.

You could  use a Mesa daughterboard (a 7I85S  or 7I78 would  add 4 step/dir axis).
You could also use an inexpensive parallel port breakout, like the common Sainsmart 
5 Axis breakout, either ST-V2 or ST-V3 or one of the many  similar parallel port
breakouts. 
  • meister
  • meister
11 Jul 2025 12:57
  • meister
  • meister
11 Jul 2025 12:56
Replied by meister on topic Xilinx Zynq 7010 fpga crypto windfall boards

Xilinx Zynq 7010 fpga crypto windfall boards

Category: Driver Boards

blocks.tcl

[code]set projectname "rio-rtl"
set part xc7z010clg400-1
set outputdir "./$projectname"

file mkdir $outputdir
create_project -part $part $projectname $outputdir

create_bd_design "blocks"

add_files -norecurse pwmout.v
set module_pwmout [create_bd_cell -type module -reference pwmout pwmout_0]

add_files -norecurse tm1638b8s7l8.v
set module_tm1638b8s7l8 [create_bd_cell -type module -reference tm1638b8s7l8 tm1638b8s7l8_0]



regenerate_bd_layout
save_bd_design
set bdpath [file dirname [get_files [get_property FILE_NAME [current_bd_design]]]]



easier than expected :)

  [attachment=70865]blocks.png[/attachment]
[/code]
Displaying 14461 - 14465 out of 14465 results.
Time to create page: 0.809 seconds
Powered by Kunena Forum