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Sounds all sensible to me but I really don't feel competent to comment on the proposed path.
I certainly like the structured approach of your initiative, that is something that has been sorely lacking in other attempts.
I think/hope that Rob will be able to give an educated opinion on it and help shape it into a concrete roadmap.

Note that Mitsubishi SSCNET requires a servo cycle <= 222us
forum.linuxcnc.org/9-installing-linuxcnc...cnet?start=70#256576

Ruckig, I think we just need the math based on the math paper I think. Don't actually need to build the thing inside linuxcnc.
I proposed a minimum of 250us because that's what other users here expressed, otherwise you could run ruckig in the servo, but I thought better keep it out, even if advertised as 50us, some calculations seems known to exceed this advertisement. The handoff was my concept idea. Inspired by how CPU have predictive branching

my calculation of the DEADBAND value:

pid_setup["DEADBAND"] = round(1 / abs(joint_config["SCALE_OUT"]) * 2, 4)

works for me

Ok so before i am breaking everything do i need something else apart for the hostmot2-firmware/tree/master from the git in order to compile a framework?

In the first file that you send to me PCW you added 4biss chanel insted of 3 and "IOPortTag & x"03" & BISSTag & BISSClkEnPin, -- I/O 16 PIN 13"
i was curious about this line?

I was going for a conf like that for 7i76_7i74biss3d depending on that this line does.

use work.IDROMConst.all;

package PIN_7I76_7I74BISS3D_34 is
constant ModuleID : ModuleIDType :=(
(HM2DPLLTag, x"00", ClockLowTag, x"01", HM2DPLLBaseRateAddr&PadT, HM2DPLLNumRegs, x"00", HM2DPLLMPBitMask),
(WatchDogTag, x"00", ClockLowTag, x"01", WatchDogTimeAddr&PadT, WatchDogNumRegs, x"00", WatchDogMPBitMask),
(IOPortTag, x"00", ClockLowTag, x"02", PortAddr&PadT, IOPortNumRegs, x"00", IOPortMPBitMask),
(BISSTag, x"00", ClockHighTag, x"03", BISSDataAddr&PadT, BISSNumRegs, x"00", BISSMPBitMask),
(QcountTag, x"02", ClockLowTag, x"01", QcounterAddr&PadT, QCounterNumRegs, x"00", QCounterMPBitMask),
(SSerialTag, x"00", ClockLowTag, x"01", SSerialCommandAddr&PadT, SSerialNumRegs, x"10", SSerialMPBitMask),
(StepGenTag, x"02", ClockLowTag, x"05", StepGenRateAddr&PadT, StepGenNumRegs, x"00", StepGenMPBitMask),
(LEDTag, x"00", ClockLowTag, x"01", LEDAddr&PadT, LEDNumRegs, x"00", LEDMPBitMask),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000"),
(NullTag, x"00", NullTag, x"00", NullAddr&PadT, x"00", x"00", x"00000000")
);


constant PinDesc : PinDescType :=(
-- Base func sec unit sec func sec pin -- external DB25
IOPortTag & x"00" & StepGenTag & StepGenDirPin, -- I/O 00 PIN 1
IOPortTag & x"00" & StepGenTag & StepGenStepPin, -- I/O 01 PIN 14
IOPortTag & x"01" & StepGenTag & StepGenDirPin, -- I/O 02 PIN 2
IOPortTag & x"01" & StepGenTag & StepGenStepPin, -- I/O 03 PIN 15
IOPortTag & x"02" & StepGenTag & StepGenDirPin, -- I/O 04 PIN 3
IOPortTag & x"02" & StepGenTag & StepGenStepPin, -- I/O 05 PIN 16
IOPortTag & x"03" & StepGenTag & StepGenDirPin, -- I/O 06 PIN 4
IOPortTag & x"03" & StepGenTag & StepGenStepPin, -- I/O 07 PIN 17
IOPortTag & x"04" & StepGenTag & StepGenDirPin, -- I/O 08 PIN 5
IOPortTag & x"04" & StepGenTag & StepGenStepPin, -- I/O 09 PIN 6
IOPortTag & x"00" & SSerialTag & SSerialTX0Pin, -- I/O 10 PIN 7
IOPortTag & x"00" & SSerialTag & SSerialRX0Pin, -- I/O 11 PIN 8
IOPortTag & x"00" & SSerialTag & SSerialTX1Pin, -- I/O 12 PIN 9
IOPortTag & x"00" & SSerialTag & SSerialRX1Pin, -- I/O 13 PIN 10
IOPortTag & x"00" & QCountTag & x"03", -- I/O 14 PIN 11
IOPortTag & x"00" & QCountTag & x"02", -- I/O 15 PIN 12
IOPortTag & x"00" & QCountTag & x"01", -- I/O 16 PIN 13

-- 26 HDR -- IDC DB25
IOPortTag & x"00" & BISSTag & BISSDataPin, -- I/O 17 PIN 1
IOPortTag & x"01" & BISSTag & BISSDataPin, -- I/O 18 PIN 14
IOPortTag & x"02" & BISSTag & BISSDataPin, -- I/O 19 PIN 2
IOPortTag & x"01" & SSerialTag & SSerialRX3Pin, -- I/O 03 PIN 15
IOPortTag & x"00" & BISSTag & BISSClkPin, -- I/O 21 PIN 3
IOPortTag & x"01" & BISSTag & BISSClkPin, -- I/O 22 PIN 16
IOPortTag & x"02" & BISSTag & BISSClkPin, -- I/O 23 PIN 4
IOPortTag & x"01" & SSerialTag & SSerialTX3Pin, -- I/O 07 PIN 17
IOPortTag & x"01" & SSerialTag & SSerialRX4Pin, -- I/O 08 PIN 5
IOPortTag & x"01" & SSerialTag & SSerialRX5Pin, -- I/O 09 PIN 6
IOPortTag & x"01" & SSerialTag & SSerialRX6Pin, -- I/O 10 PIN 7
IOPortTag & x"01" & SSerialTag & SSerialRX7Pin, -- I/O 11 PIN 8
IOPortTag & x"01" & SSerialTag & SSerialTX4Pin, -- I/O 12 PIN 9
IOPortTag & x"01" & SSerialTag & SSerialTX5Pin, -- I/O 13 PIN 10
IOPortTag & x"01" & SSerialTag & SSerialTX6Pin, -- I/O 14 PIN 11
IOPortTag & x"01" & SSerialTag & SSerialTX7Pin, -- I/O 15 PIN 12
IOPortTag & x"01" & SSerialTag & SSerialTXEn7Pin, -- I/O 16 PIN 13

Do you know of Freecad works for plasma cutting with freecad and linuxcnc?

I'm a bit weary of anything that comes out of AI.
Could you give a bit more background information as to how you came up with these outlines? In other words: Are these the result of conscious deliberation or is that a product of AI?

### Architecture Principles

**RT thread (250µs capable):** Only evaluates pre-computed polynomials. No planning, no Ruckig, no kinematics. Just `position = evaluate_polynomial(t)` and send to drives.

**Userspace:** All heavy computation. Ruckig, backward velocity pass, kinematics, blending. Not tied to servo cycle.

**Predictive Handoff:** When replanning is needed (feed override, etc), userspace plans from a predicted future state, not current state. RT continues executing until the handoff time, then seamlessly transitions. This decouples userspace latency from RT determinism.

**Buffer Management:** Track buffer in TIME, not segment count. Short segments and long segments treated appropriately.

I notice that you mention the use of 'ruckig', is this a decision you made or is that something AI suggested?
According to this statement (which I have not verified )the 'ruckig' library is not free for more advanced uses. (Not that this must necessarily be a deal breaker):
forum.linuxcnc.org/38-general-linuxcnc-q...nner?start=70#320906

[edit]
there seems to be a ''community" and a "pro" version of ruckig:
docs.ruckig.com/md_pages_2__intermediate__waypoints.html

There seems to be little information about the 'pro' version:
github.com/pantor/ruckig/issues/78

Again, something is not OK if you can change values of FFx and get no change in response, so are the drives set in "velocity" or "torque" mode?

The encoder came in and would like to ask what is the best ppr setting to select? I will have max 3600 rpm and i want to do rigid tapping.

rotational speed (at each
resolution)
192, 384, 400, 500, 800, 1000, 1024, 2048 7500 RPM
48, 96, 100, 125, 200, 250, 256, 512 15000 RPM

giaviv wrote:

However I’m a bit limited by the low ram (8GB), low disk space and etc.

8GB should be fine, and how low is "low disk space"? Linux starts complaining only when you get under 1GB of free space, so anything above is fine.

giaviv wrote:

I realize newer models are risky, therefore some of the models I am looking at are far from new generation CPUs (like the Ryzen5 7535U)..

7535U is not "far from new", it is new and still in production, Zen3 with 15W TDP, so it is a laptop CPU and this may be bad for latency, although not always.

giaviv wrote:

Or is CPU not the only potential issue, but also things like the motherboard etc?

CPU's are mostly fine as they can change states and do stuff, mainboards are usually the latency killers depending on quality, BIOS implementation, power saving options, etc, etc, way to many to list here, but mostly bad/weak CPU power stage set to work at the edge and throttling the CPU to save itself from going up in smoke.
-
As a general rule, i would stay away from those small PC's, they are cute and stuff, but way to limited thermally, the xxxxU versions are fine, but a 13900 ... oh hell no, it will be limited thermally to something like a good 4 core CPU when under load, and they fail but being limited will prolong their life a lot so...
There were some NUC's that were OK for LinuxCNC way back.
After all this, there is no way to know for sure if any of those will be OK, short of buying and testing.

I'll try to have a look at the '9D' branch later. Thanks.

which I got not much feedback..

Just as a word of caution from my own experience:
You mustn't expect to much from a forum thread like this. Few people will even read a post that long, fewer still look at the code and hardly anybody will even try to understand it. I know of at least one long time contributor, since retired, who got quite bitter about trying to get sustained and involved feedback here. Even from the very people asking for the specific feature.

Many of us run systems with much lower spec CPUs, like Celeron J1900, i3-6100, N100, N150 with good result. 8GB should be plenty.

What does your latency-plot look like?

This is a good opportunity, but how do I configure these inputs and outputs? I tried different *.xml files, DeASDA and generic. The pins are in the HAL, but the servo drive does not respond to them. ASDA software controls it normally.

i think you mean: 2.9.8

you can try this with running linuxcnc:

halcmd show | grep spindle

and see if there are some spindle pins

Hakan wrote:

38? -3 here.
What made it work?
 

Actually hit 41.8 deg C here today so a bit hotter. (Therefore I did not get that much done!)
I cheated and only moved the one working motor for the video oops!
I saw that: Modes can be switched while the drive is in the "Operation enabled" state
Probing could also be handy.
I'll keep you in the loop