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  • dunnitagain
  • dunnitagain
07 Jul 2025 17:25
Replied by dunnitagain on topic Failed Parallel Port on system, Recommended Easiest Upgrade Solution ?

Failed Parallel Port on system, Recommended Easiest Upgrade Solution ?

Category: General LinuxCNC Questions

I used RUFUS to create the ISO , its an older 2Gb stick. The motherboard is an Intel D510 , Intel Atom 1.66ghz , 64bit.
  • laurentl38
  • laurentl38
07 Jul 2025 17:20
Replied by laurentl38 on topic IO Questions around mixing IO between Ethercat and Pi 5?

IO Questions around mixing IO between Ethercat and Pi 5?

Category: EtherCAT

it's very strang
I think I found the problem:
If I replace "QuadEncMp[0];" with "4" line 430, 435, ..

it's working.

replace for each encoder
:
#if QUADENCS >= 1
EncCount[0] = Encoder0.read()/QuadEncMp[0];

by
#if QUADENCS >= 1
EncCount[0] = Encoder0.read()/4;
  • JackRay
  • JackRay
07 Jul 2025 16:47
Replied by JackRay on topic homing with Phase Z encoder on MESA 7i96s

homing with Phase Z encoder on MESA 7i96s

Category: Advanced Configuration

now it's ok, my homing works properly. Thank you very much for your help. I now need to set it up to return to my Zero machine. Is it the Homing parmeter? or Homing Offset to apply an offset?
  • Roger S
  • Roger S
07 Jul 2025 16:36
Replied by Roger S on topic Probe Basic Screen missing axes

Probe Basic Screen missing axes

Category: QtPyVCP

Hello Langdons,

Even with clean and autoremove, the axes are missing in the GUI
  • meister
  • meister
07 Jul 2025 16:16
Replied by meister on topic Xilinx Zynq 7010 fpga crypto windfall boards

Xilinx Zynq 7010 fpga crypto windfall boards

Category: Driver Boards



 
  • meister
  • meister
07 Jul 2025 16:10
Replied by meister on topic Xilinx Zynq 7010 fpga crypto windfall boards

Xilinx Zynq 7010 fpga crypto windfall boards

Category: Driver Boards

here is a manual to set password and configure network of the preinstalled linux system (if it works depends on your hardware)
github.com/xjtuecho/EBAZ4205

now i can copy my bitfile via scp and load it via linux-console on the board:
oliver@office-station:/mnt/data2/src/riocore/Output/EBAZ4205/Gateware$ scp  -oHostKeyAlgorithms=+ssh-rsa ./rio-rtl/rio-rtl.runs/impl_1/bd_rio_wrapper.bit   root@192.168.10.199:/tmp/
root@192.168.10.199's password: 
bd_rio_wrapper.bit                                                                                                  100% 2035KB   3.9MB/s   00:00    
oliver@office-station:/mnt/data2/src/riocore/Output/EBAZ4205/Gateware$ ssh -oHostKeyAlgorithms=+ssh-rsa  root@192.168.10.199
root@192.168.10.199's password: 
root@zedboard-zynq7:~# cat /tmp/bd_rio_wrapper.bit > /dev/xdevcfg
root@zedboard-zynq7:~#

next step is to transfare data between ARM-Core and FPGA-Part
  • laurentl38
  • laurentl38
07 Jul 2025 16:07 - 07 Jul 2025 16:11
Replied by laurentl38 on topic IO Questions around mixing IO between Ethercat and Pi 5?

IO Questions around mixing IO between Ethercat and Pi 5?

Category: EtherCAT

in first time, yes i modified line 98 and add line 121
in second time, i mak a little modification at line 454 : 

but the same error still occurs.

 

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