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LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
28 Jun 2024 08:21 #303960
by meister
Replied by meister on topic LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
so, have add some pin-mappings for the v04 board (DB3) and add 3 stepdir plugins ...
sorry, wrong test file, you need the .bit :
multixmedia.org/Spartan6.bit
#: PYTHONPATH=. python3 ../riogui/bin/rio-setup riocore/configs/Spartan6/config-test.json
#: PYTHONPATH=. python3 bin/rio-generator -b riocore/configs/Spartan6/config-test.json
....
Running DRC.
DRC detected 0 errors and 0 warnings.
Creating bit map...
Saving bit stream in "rio.bit".
#: halcompile --install Output/Spartan6/LinuxCNC/rio.c
Compiling realtime rio.c
Linking rio.so
cp rio.so /usr/lib/linuxcnc/modules/
#: linuxcnc Output/Spartan6/LinuxCNC/rio.in
...
sorry, wrong test file, you need the .bit :
multixmedia.org/Spartan6.bit
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28 Jun 2024 08:36 #303961
by cornholio
Replied by cornholio on topic LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
I need to setup my RPi4 to test SPI, been somewhat busy today so not a lot of time to do much.
I think I may have a an image floating around.
Is there a way to test the UDPSPI bridge prior to connecting it to a FPGA board ? Will it respond to a ping ? I rebuilt the W32-ETH01 firmware and it seemed to upload ok.
I think I may have a an image floating around.
Is there a way to test the UDPSPI bridge prior to connecting it to a FPGA board ? Will it respond to a ping ? I rebuilt the W32-ETH01 firmware and it seemed to upload ok.
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28 Jun 2024 08:46 #303962
by meister
Replied by meister on topic LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
ping should work, have to look in the source code for the IP, not sure if it is static
the test-bitfile need no connection, it just blinking (i hope)
the test-bitfile need no connection, it just blinking (i hope)
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28 Jun 2024 11:56 #303967
by cornholio
Replied by cornholio on topic LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
Well mate I can't say if it works or not, my dev board has decided not to play nicely.
Loads to SRAM but afterwards doesn't conifg, this is even with some known good bit files.
It's a hell of an effort to write to Flash, every time I try the flash chip returns different ID.
If I run openFGPALoader to detect the FPGA it works fine.
Just a few notes, the on board OSC is actually 50Mhz not 25MHz as per schemtic
Speed type is -2 not -3 .
Loads to SRAM but afterwards doesn't conifg, this is even with some known good bit files.
It's a hell of an effort to write to Flash, every time I try the flash chip returns different ID.
If I run openFGPALoader to detect the FPGA it works fine.
Just a few notes, the on board OSC is actually 50Mhz not 25MHz as per schemtic
Speed type is -2 not -3 .
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28 Jun 2024 12:06 #303970
by meister
Replied by meister on topic LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
have update the board config in git and build and upload a new bitstream file.
i have the same problem with openFGPALoader and MachXO3 from lattice
i have the same problem with openFGPALoader and MachXO3 from lattice
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28 Jun 2024 13:38 #303972
by cornholio
Replied by cornholio on topic LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
It may have been the fault of mine, I changed the flash chip out, it may have been a dodgy one. I'll chase up an original M25P40 and put it back on.
In the meantime I have access to a few other Spartan6 boards, one with the same FPGA on it, pins are just a bit different and only 70 GPIO available, but does have 6 LEDS and 4 switches on the board
Al least I'll still be able to experiment, got plenty of dupont cables to patch the FPGA board to my daughterboards.
Thanks for all your help, changing things around is pretty straight forward, and after messing with the Mesa firmwares I feel comfortable messing about with it.
In the meantime I have access to a few other Spartan6 boards, one with the same FPGA on it, pins are just a bit different and only 70 GPIO available, but does have 6 LEDS and 4 switches on the board
Al least I'll still be able to experiment, got plenty of dupont cables to patch the FPGA board to my daughterboards.
Thanks for all your help, changing things around is pretty straight forward, and after messing with the Mesa firmwares I feel comfortable messing about with it.
The following user(s) said Thank You: meister
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29 Jun 2024 06:35 - 29 Jun 2024 06:39 #304003
by cornholio
Replied by cornholio on topic LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
Ok had a play around.Build works OKFlashing works okAfter flashing, when SPI interface not connected, no blinking lights observed.Has to create a new board called Mimas, and the config to go with.Just copied the Spartan6 stuff.After generating everything has browse thru the Ouput/Mimas/Gateware folder everthing was there, pin constraints matched what I need. Just added the "drive setup" for each pin.Still need to setup the Rpi for Linuxcnc.Included some file for you to look at.
Last edit: 29 Jun 2024 06:39 by cornholio.
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29 Jun 2024 15:04 #304023
by cornholio
Replied by cornholio on topic LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
Ok went back to my Lattice dev board, and connected up via SPI, qt test works, LCNC does not. get header message error. Could be my wiring.
Once I finally worked out the pin changes in my sources, from about 12 months or so the UDP bridge works fine, well at least with qt test.
It's 1am, Marc crashed out of the Sprint at Assen (grumble grumble grumble), I'll attack it when the sun is up.
This is beginning to seem like an ID 10 T issue and it's all my fault.
Once I finally worked out the pin changes in my sources, from about 12 months or so the UDP bridge works fine, well at least with qt test.
It's 1am, Marc crashed out of the Sprint at Assen (grumble grumble grumble), I'll attack it when the sun is up.
This is beginning to seem like an ID 10 T issue and it's all my fault.
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29 Jun 2024 21:53 #304061
by meister
Replied by meister on topic LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
if you change the gateware on the FPGA, you have to recompile the hal-component,
the test gui used the json-config, but the hal-component (rio.c) ist generated and need an
halcompile --install rio.c after changes
the test gui used the json-config, but the hal-component (rio.c) ist generated and need an
halcompile --install rio.c after changes
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29 Jun 2024 22:45 #304064
by cornholio
Replied by cornholio on topic LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)
Yep I remembered that.
I'll just keep plodding along and see how I go.
I've ordered some new flash chips and another dev board so at least I can go back to square one.
Just out of interest, with the WT32-ETH01 module should it be powered with 3.3v or 5v ?
I'll just keep plodding along and see how I go.
I've ordered some new flash chips and another dev board so at least I can go back to square one.
Just out of interest, with the WT32-ETH01 module should it be powered with 3.3v or 5v ?
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