Absolute Encoder Questions / SSI via 5i25

I tried 500kHz, 800kHz too.

What is absenc.N.debug pin? It's always 33333333 no matter what frequency-khz is.
But
+ *enc->hal.pin.debug = hm2->absenc.clock_frequency;

Not sure but you can certainly look at the source

50 KHZ is likely to not work, if your encoder can do 1MHZ I would start there

I'm trying 1000, no changes.
Something's probably wrong elsewhere.
I even replaced the config string with the string I checked before... still nothing.

andypugh: I commented out that annoying error message. Now it shows
hm2/hm2_5i25.0: num absencs = 0
though I start hm2_pci with num_absencs = 1 or 2 and there are absenc.00 and 01 hal pins.

andypugh
I seem to have found a bug

hm2->absenc.clock_frequency = md->clock_freq

Which equals to clock_low = 33.3MHz

UPD: Oh no, wrong conclusion. It's meant this way. Just wonder why we need to report FPGA clock frequency.
To make sure the right parameters written to encoder I just used the parameters string that worked for me. No reading.
Now I will look to read function...

FPGA clock_low can vary from 33.3 MHz to 100 Mhz or more depending on FPGA card. The driver needs the clock_low frequency in order to set the SSI clock generator to the requested rate:
SSIDDS := (SSIClockRate*65536/Clock_low) SHL 16

Probably the best way to start a SSI/BISS/Fanuc encoder transfer or a SPI transfer is via a timer start, some programmable number of uSec before the nominal servo thread actuation, so the data is already there when needed (and the sample time is de-jittered)

The "trigger" code is tiny. What I can imagine doing is adding it to a base thread that adaptively works out how it is phased relative to the servo thread, and sends a trigger on the correct call instance. (servo thread and base thread are always an integer ratio)

This is essentially what the DPLL timer system does except that it requires no base thread (its phase locked to the servo thread)and has ns resolution and ns jitter (the timer start bit in the control register is a gate for this, there will be a 4 bit timer select register (15..12) added as well to select which timer output is used. Each of the 16 available timer output can be programed to an arbitrary phase time relative to the servo thread sync point