Absolute Encoder Questions / SSI via 5i25
17 Aug 2013 19:55 #37782
by PKM
Replied by PKM on topic Absolute Encoder Questions / SSI via 5i25
I'll check that on Monday... occasionally left the encoders at my office.
If that proves to work, is it possible to make a thread to start the reading cycle, then connect the hm2_5i25.0.raw.read_data to some "grey-to-abs" component (probably not so hard to make) and have the encoder working?
If that proves to work, is it possible to make a thread to start the reading cycle, then connect the hm2_5i25.0.raw.read_data to some "grey-to-abs" component (probably not so hard to make) and have the encoder working?
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17 Aug 2013 23:11 - 18 Aug 2013 00:53 #37783
by PCW
Replied by PCW on topic Absolute Encoder Questions / SSI via 5i25
One detail left out is is that the DDR and AltSrc register bits for the clock output pin would need to be set to one (since the driver does not know about the SSI tags)
Also if you use the latest firmware source, the SSI registers have changed:
The max data length has been extended to 64 bits to allow double-reading
for data verification, so the control reg has moved to 0x6A00
included here:
is a up-to-date regmap file and example program source
for reading the encoder
Also if you use the latest firmware source, the SSI registers have changed:
The max data length has been extended to 64 bits to allow double-reading
for data verification, so the control reg has moved to 0x6A00
included here:
is a up-to-date regmap file and example program source
for reading the encoder
Last edit: 18 Aug 2013 00:53 by PCW.
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18 Aug 2013 03:31 #37786
by PKM
Replied by PKM on topic Absolute Encoder Questions / SSI via 5i25
I looked through 7i76 manual, there are SS0TX (IO10) and SS1TX (IO12) pins, which is used for RS-422 interface on TB3?One detail left out is is that the DDR and AltSrc register bits for the clock output pin would need to be set to one (since the driver does not know about the SSI tags)
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19 Aug 2013 18:46 #37843
by PKM
Replied by PKM on topic Absolute Encoder Questions / SSI via 5i25
I'm trying the above described, but nothing for now. Even no clock sequence on the scope.
When setting 0x6A00 it remains the same 0xFFFFFFFF (while 0x1100 changes when I write to it). What should be the default value for 0x6A00?
I purchased 7i76-5i25 PnG kit on June 2013, is it possible that the firmware has no SSI? The latest 7i76x2.bit is dated 2013-02-22, so I guess my card should have it?
When setting 0x6A00 it remains the same 0xFFFFFFFF (while 0x1100 changes when I write to it). What should be the default value for 0x6A00?
I purchased 7i76-5i25 PnG kit on June 2013, is it possible that the firmware has no SSI? The latest 7i76x2.bit is dated 2013-02-22, so I guess my card should have it?
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19 Aug 2013 19:08 #37844
by andypugh
The FPGA has read-registers and write-registers. There may be one of each with the same address, but they are not the same register.
any read-back from a write-register will be 0xFFFFFFFF. You can't check that your write worked.
Replied by andypugh on topic Absolute Encoder Questions / SSI via 5i25
This is normal (and really confused me when I started playing with Hostmot2 drivers).When setting 0x6A00 it remains the same 0xFFFFFFFF
The FPGA has read-registers and write-registers. There may be one of each with the same address, but they are not the same register.
any read-back from a write-register will be 0xFFFFFFFF. You can't check that your write worked.
it is certain that that bitfile has no SSI. You will need a bitfile which explicitly includes the function, and then you would need to write that bitfile to the 5i25 with Mesaflash.I purchased 7i76-5i25 PnG kit on June 2013, is it possible that the firmware has no SSI?
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19 Aug 2013 19:24 #37845
by PKM
Replied by PKM on topic Absolute Encoder Questions / SSI via 5i25
Thanks, that explains a lot!
Peter, could you please make SSI firmware for 5i25+7i76?
Peter, could you please make SSI firmware for 5i25+7i76?
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20 Aug 2013 00:57 #37858
by andypugh
(Initially a straight clone, I suspect, but they might converge into a generic "absolute encoders" module in the future.)
Replied by andypugh on topic Absolute Encoder Questions / SSI via 5i25
If you send me a copy too, I will see about re-hashing the (very similar conceptually) Resolver code to handle SSI.Peter, could you please make SSI firmware for 5i25+7i76?
(Initially a straight clone, I suspect, but they might converge into a generic "absolute encoders" module in the future.)
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20 Aug 2013 01:19 #37859
by ROG
Replied by ROG on topic Absolute Encoder Questions / SSI via 5i25
5i25 / 7i77/BISS/SSI as well please ….
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20 Aug 2013 01:58 - 20 Aug 2013 01:59 #37861
by PKM
And BiSS encoders have been waiting on the shelf, anytime.
Replied by PKM on topic Absolute Encoder Questions / SSI via 5i25
I'm willing to test and use. I'll have these linear SSI encoders for 2-3 more weeks. Probably some multi-turn SSI later.If you send me a copy too, I will see about re-hashing the (very similar conceptually) Resolver code to handle SSI.
(Initially a straight clone, I suspect, but they might converge into a generic "absolute encoders" module in the future.)
And BiSS encoders have been waiting on the shelf, anytime.
Last edit: 20 Aug 2013 01:59 by PKM.
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20 Aug 2013 02:08 #37862
by PCW
Replied by PCW on topic Absolute Encoder Questions / SSI via 5i25
I'll try and build some SSI configs today or tomorrow.
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