LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)

I'm trying to get the gowin toolchain up and running on rpi5. It gives me an error when execute making all.I see you've already mentioned this error. I downloaded and cloned the dev version and it still doesn't work. Any tips...

I see there is another option 'generic_spi'. I will test that on rpi5 too just to get that toolchain working. I don't want to take the TN9 out of the device and program on windows anymore.

 

on my system, the gowin makefile works fine, are you sure gowin is running on arm64 cpu's ?

@ meister: Great. Thanks.

@ Zayoo: I have the same problem with the toolchain on the Pi5.

However, you can use the IDE on a Windows PC. Just copy the files from Gateware and open the project file with the IDE rio.gprj. 

By the way, I am wondering what the maximum SPI speed on the pin headers of the Raspberary looks like to ensure transfer without errors. These are not suitable for very high frequency. Hence, even if the hardware can run very high frequency, the pin headers are the limiting factor.

What is the required SPI frequency to run the Iceshield?

I can confirm that generic_spi communicate with board.

@MirkoCNC
And not just headers, but also SPI lines. They should be as short as possible. I tested on my bord at 4Mhz no errors at 4.5Mhz wrong data and to many errors.

Zayoo wrote:

I can confirm that generic_spi communicate with board.

@MirkoCNC
And not just headers, but also SPI lines. They should be as short as possible. I tested on my bord at 4Mhz no errors at 4.5Mhz wrong data and to many errors.
 

Something must be awfully wrong somewhere if constraint to only 4meg. I can do 50Mhz no problem with a dedicated PLL clock and differential data lines (terminated at only one end). And more or less 25Mhz over cheap/inductive dupon jumper wires... 

meister wrote:

 

Can't recommend this set-up enough. For those who aren't particularly interested in engineering hardware and want a Snap-On Ready Kit, it just won't get any better than that. That'll do 50meg, prolly capable of more. Oliver did it all for grab  github.com/multigcs/rio-tangbob

Flash the bitstream over, plug-in a shielded 100mb cat6, and be done!!

the SPI speed depends also on the FPGA-Clock, the SPI-Slave is programmed in verilog and need some clock cycles.

So you need a higher FPGA-Clock or someone have to program a plugin based on the buildin spi slave, but this can not be ported between the different FPGA's (gowin, ice40, ...) and the pins are not freely choosable

If I recall correctly I've PLL a fpga gpio at 50meg so to rid of that wizzy OSC extra part (im cheap, I know lol). If not 50M SPI then for sure it's full on 25Mhz and plenty capable kit. 

Doesn't matter, what's important to pay attention is something ain't right at 4Mhz, I suspect Lcnc won't be happy about that in fact. Perhaps the raspi is to be avoided if running on such a lazy tick?

What happened with enable and error hardware implementation in riocore?