Mesa 7i95
25 Feb 2020 22:49 #158498
by bensttech
The following user(s) said Thank You: dkraft
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25 Feb 2020 23:25 #158499
by tommylight
Replied by tommylight on topic Mesa 7i95
7i95 should be etherner, so here is a ready made ISO with Linux Mint and Preempt-RT kernel and Linuxcnc installed.
forum.linuxcnc.org/9-installing-linuxcnc...t-19-2-with-linuxcnc
forum.linuxcnc.org/9-installing-linuxcnc...t-19-2-with-linuxcnc
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26 Feb 2020 18:42 #158563
by 0x2102
I believe the 7i95 requires LCNC 2.9.
Linux Mint with preempt-rt kernel is a great base for LinuxCNC.
You can use Pncconf Wizard and use the 7i76e to build the base config. Then search and replace 7i76e in your .hal file with 7i95.
Input Pin names:
hm2_7i95.0.inmux.00.input-00
Output Pin names:
hm2_7i95.0.ssr.00.out-00
The 7i95 doesn't have a 0-10v spindle output like the 7i76e - so you will need a spindle vfd / amp that uses step/dir or a custom bitfile that converts a StepGen to a PWM and use a 0-10V PWM adapter or you can try to control the VFD with Modbus.
Linux Mint with preempt-rt kernel is a great base for LinuxCNC.
You can use Pncconf Wizard and use the 7i76e to build the base config. Then search and replace 7i76e in your .hal file with 7i95.
Input Pin names:
hm2_7i95.0.inmux.00.input-00
Output Pin names:
hm2_7i95.0.ssr.00.out-00
The 7i95 doesn't have a 0-10v spindle output like the 7i76e - so you will need a spindle vfd / amp that uses step/dir or a custom bitfile that converts a StepGen to a PWM and use a 0-10V PWM adapter or you can try to control the VFD with Modbus.
The following user(s) said Thank You: bensttech
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28 Feb 2020 07:40 #158731
by bensttech
Ok i am running LINUXCNC - 2.9.0-pre0-1075-geb670bb09 and have a basic config
it detects the 7i95 lists TB1-TB5 and the P1 port in messages but nothing about TB6? what i am i missing?
it detects the 7i95 lists TB1-TB5 and the P1 port in messages but nothing about TB6? what i am i missing?
hm2: loading Mesa HostMot2 driver version 0.15
hm2_eth: loading Mesa AnyIO HostMot2 ethernet driver version 0.2
hm2_eth: 10.10.10.10: Hardware address: 00:60:1b:15:00:34
hm2_eth: discovered 7I95
hm2/hm2_7i95.0: Low Level init 0.15
hm2/hm2_7i95.0: Smart Serial Firmware Version 43
hm2/hm2_7i95.0: 58 I/O Pins used:
hm2/hm2_7i95.0: IO Pin 000 (TB3-02/TB3-03): StepGen #0, pin Step (Output)
hm2/hm2_7i95.0: IO Pin 001 (TB3-04/TB3-05): StepGen #0, pin Direction (Output)
hm2/hm2_7i95.0: IO Pin 002 (TB3-08/TB3-09): StepGen #1, pin Step (Output)
hm2/hm2_7i95.0: IO Pin 003 (TB3-10/TB3-11): StepGen #1, pin Direction (Output)
hm2/hm2_7i95.0: IO Pin 004 (TB3-14/TB3-15): StepGen #2, pin Step (Output)
hm2/hm2_7i95.0: IO Pin 005 (TB3-16/TB3-17): StepGen #2, pin Direction (Output)
hm2/hm2_7i95.0: IO Pin 006 (TB3-20/TB3-21): StepGen #3, pin Step (Output)
hm2/hm2_7i95.0: IO Pin 007 (TB3-22/TB3-23): StepGen #3, pin Direction (Output)
hm2/hm2_7i95.0: IO Pin 008 (TB4-02/TB4-03): StepGen #4, pin Step (Output)
hm2/hm2_7i95.0: IO Pin 009 (TB4-04/TB4-05): StepGen #4, pin Direction (Output)
hm2/hm2_7i95.0: IO Pin 010 (TB4-08/TB4-09): IOPort
hm2/hm2_7i95.0: IO Pin 011 (TB4-10/TB4-11): IOPort
hm2/hm2_7i95.0: IO Pin 012 (TB4-14/TB4-15): IOPort
hm2/hm2_7i95.0: IO Pin 013 (TB4-16/TB4-17): IOPort
hm2/hm2_7i95.0: IO Pin 014 (TB3-16/TB3-17): IOPort
hm2/hm2_7i95.0: IO Pin 015 (TB4-20/TB4-21): IOPort
hm2/hm2_7i95.0: IO Pin 016 (TB4-22/TB4-23): IOPort
hm2/hm2_7i95.0: IO Pin 017 (TB4-22/TB4-23): IOPort
hm2/hm2_7i95.0: IO Pin 018 (TB1-01/TB1-09): Muxed Encoder #0, pin Muxed A (Input)
hm2/hm2_7i95.0: IO Pin 019 (TB1-04/TB1-12): Muxed Encoder #0, pin Muxed B (Input)
hm2/hm2_7i95.0: IO Pin 020 (TB1-07/TB1-15): Muxed Encoder #0, pin Muxed Index (Input)
hm2/hm2_7i95.0: IO Pin 021 (TB1-17/TB2-01): IOPort
hm2/hm2_7i95.0: IO Pin 022 (TB1-20/TB2-04): IOPort
hm2/hm2_7i95.0: IO Pin 023 (TB1-23/TB2-07): IOPort
hm2/hm2_7i95.0: IO Pin 024 (TB2-09/TB2-17): IOPort
hm2/hm2_7i95.0: IO Pin 025 (TB2-12/TB2-20): IOPort
hm2/hm2_7i95.0: IO Pin 026 (TB2-15/TB2-23): IOPort
hm2/hm2_7i95.0: IO Pin 027 (Internal EncMux): Muxed Encoder Select #0, pin Mux Select 0 (Output)
hm2/hm2_7i95.0: IO Pin 028 (Internal InMux0): InMux Input Mux #0, pin addr0 (Output)
hm2/hm2_7i95.0: IO Pin 029 (Internal InMux1): InMux Input Mux #0, pin addr1 (Output)
hm2/hm2_7i95.0: IO Pin 030 (Internal InMux2): InMux Input Mux #0, pin addr2 (Output)
hm2/hm2_7i95.0: IO Pin 031 (Internal InMux3): InMux Input Mux #0, pin addr3 (Output)
hm2/hm2_7i95.0: IO Pin 032 (Internal InMux4): InMux Input Mux #0, pin addr4 (Output)
hm2/hm2_7i95.0: IO Pin 033 (Internal InMuxData): InMux Input Mux #0, pin muxdata (Input)
hm2/hm2_7i95.0: IO Pin 034 (TB5-13/TB5-14): SSR #0, pin Out-00 (Output)
hm2/hm2_7i95.0: IO Pin 035 (TB5-15/TB5-16): SSR #0, pin Out-01 (Output)
hm2/hm2_7i95.0: IO Pin 036 (TB5-17/TB5-18): SSR #0, pin Out-02 (Output)
hm2/hm2_7i95.0: IO Pin 037 (TB5-19/TB5-20): SSR #0, pin Out-03 (Output)
hm2/hm2_7i95.0: IO Pin 038 (TB5-21/TB5-22): SSR #0, pin Out-04 (Output)
hm2/hm2_7i95.0: IO Pin 039 (TB5-23/TB5-24): SSR #0, pin Out-05 (Output)
hm2/hm2_7i95.0: IO Pin 040 (internal): SSR #0, pin AC Ref (Output)
hm2/hm2_7i95.0: IO Pin 041 (P1-01): IOPort
hm2/hm2_7i95.0: IO Pin 042 (P1-02): IOPort
hm2/hm2_7i95.0: IO Pin 043 (P1-03): IOPort
hm2/hm2_7i95.0: IO Pin 044 (P1-04): IOPort
hm2/hm2_7i95.0: IO Pin 045 (P1-05): IOPort
hm2/hm2_7i95.0: IO Pin 046 (P1-06): IOPort
hm2/hm2_7i95.0: IO Pin 047 (P1-07): IOPort
hm2/hm2_7i95.0: IO Pin 048 (P1-08): IOPort
hm2/hm2_7i95.0: IO Pin 049 (P1-09): IOPort
hm2/hm2_7i95.0: IO Pin 050 (P1-11): IOPort
hm2/hm2_7i95.0: IO Pin 051 (P1-13): IOPort
hm2/hm2_7i95.0: IO Pin 052 (P1-15): IOPort
hm2/hm2_7i95.0: IO Pin 053 (P1-17): IOPort
hm2/hm2_7i95.0: IO Pin 054 (P1-19): IOPort
hm2/hm2_7i95.0: IO Pin 055 (P1-21): IOPort
hm2/hm2_7i95.0: IO Pin 056 (P1-23): IOPort
hm2/hm2_7i95.0: IO Pin 057 (P1-25): IOPort
hm2/hm2_7i95.0: registered
Found file(REL): ./custom.hal
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28 Feb 2020 10:36 - 28 Feb 2020 10:48 #158738
by bensttech
Update, they appear in the hal tree but not the debug o/p sorry i wasted any ones time
Looking at it again are the Inputs actually accessed via IO Pin 028 - 33 through a mux system? In which case does anyone have a hal function to get these into discrete inputs and should this not be handled at drive level?? any help would be much appreciated.
Looking at it again are the Inputs actually accessed via IO Pin 028 - 33 through a mux system? In which case does anyone have a hal function to get these into discrete inputs and should this not be handled at drive level?? any help would be much appreciated.
Last edit: 28 Feb 2020 10:48 by bensttech.
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28 Feb 2020 11:04 #158742
by PCW
The following user(s) said Thank You: Muecke
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