ColorCNC Colorlight 5A-75E/5A-75B as FPGA controller board

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3 years 11 months ago #257993 by romanetz
Well, the firmware compilation on my PC takes 5-10 minutes. PlaceNRouting is the most time consuming process. With 6 encoders, 6 stepgens, 12DI 12DO 3PWM the firmware doesn't meet timing requirements. But, in generally, rather close to them (38,4 instead of 40 Mhz and 114,5 instead of 125 Mhz).
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3 years 11 months ago #258021 by TOLP2

Well, the firmware compilation on my PC takes 5-10 minutes. PlaceNRouting is the most time consuming process. With 6 encoders, 6 stepgens, 12DI 12DO 3PWM the firmware doesn't meet timing requirements. But, in generally, rather close to them (38,4 instead of 40 Mhz and 114,5 instead of 125 Mhz).
 
That sounds a whole different story from what my PC is doing now. Just to check, you have modified one of the Json files to make your own config and build it with Litex-CNC? Could you share that config so I can test my build system? 
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3 years 11 months ago #258095 by romanetz
Here is my JSON, used for firmware compilation.
Attachments:
The following user(s) said Thank You: TOLP2
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3 years 11 months ago #258124 by TOLP2
This is getting very strange:
Code:
Info: Max frequency for clock                 '$glbnet$crg_clkout0': 25.21 MHz (FAIL at 40.00 MHz) Info: Max frequency for clock '$glbnet$eth_clocks_rx$TRELLIS_IO_IN': 62.09 MHz (FAIL at 125.00 MHz)

I think my building system is splunked, because:
  • the timings have failed worse then in your case;
  • the build time is again exploding in my face (think it is related with the first case).
@romanetz: what is your toolchain you're using (i.e. version/branch of LitexCNC, Litex, Yosys, OSS-CAD-Suite). Dis you install the toolchain using the commands from LitexCNC or did you install it yourself? 
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3 years 11 months ago - 3 years 11 months ago #258134 by romanetz
I'm not sure if I use the latest version.
Yosys 0.16+61 (git sha1 c785cb7fe, clang 10.0.0-4ubuntu1 -fPIC -Os)
nextpnr-ecp5 -- Next Generation Place and Route (Version nextpnr-0.3-14-g20cfafa1)
Project Trellis ecppack Version 1.0-496-g7454564

Info: Max frequency for clock                 '$glbnet$crg_clkout0': 43.53 MHz (PASS at 40.00 MHz)
Warning: Max frequency for clock '$glbnet$eth_clocks_rx$TRELLIS_IO_IN': 116.63 MHz (FAIL at 125.00 MHz)

 
Last edit: 3 years 11 months ago by romanetz.
The following user(s) said Thank You: TOLP2
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3 years 11 months ago - 3 years 11 months ago #258150 by romanetz
Well. I've found some description of the network protocol that is implemented in original firmware.
hkubota.wordpress.com/2022/01/31/winter-...ght-5a-75b-protocol/
The goal of further investigation is to provide some kind of utility to convert colorlight card into litexcnc (so, in-system programming) without any soldering.
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Last edit: 3 years 11 months ago by romanetz.
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