ColorCNC Colorlight 5A-75E/5A-75B as FPGA controller board

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3 years 11 months ago #257547 by TOLP2
Spend last few days on cleaning the repository and create a package which is installable using pip. I've just tested an upload to test.pypi.org  and this looks promising. The package has the following functions:
  • install Litex
  • install the ECP5 toolchain (supported boards: 5A-75B and 5A-75E);
  • build the firmware from the JSON-file
  • install the driver in LinuxCNC
This massively eases the use of the FPGA and the driver.

The process to get the driver and firmware up and running would be:
Code:
pip install chardet pip install --extra-index-url https://test.pypi.org/simple/ litexcnc litexcnc install_litex litexcnc install_toolchain litexcnc install_driver litexcnc build_firmware <path-to-configuration-json> -o ./build --build

The process above will result in both a .svf-file and a .bit-file which can be uploaded to the FPGA.

NOTES:
  • chardet will be included in the next release.
  • As soon as the package is released to the main-server (pypi.org) the switch -i  test.pypi.org/simple/ is no longer necessary
  • Depending on your installation pip might be required to be replaced with pip3.
  • To install Litex and the toolchain elevated acces might be required (sudo ...)
A more elaborated description of the process is given on  test.pypi.org .
The following user(s) said Thank You: tuzki
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3 years 11 months ago #257766 by TOLP2
At this moment working on documenting Litex-CNC. A preview on the documentation is available on  readthedocs .
The following user(s) said Thank You: Bari, tuzki
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3 years 11 months ago #257863 by romanetz
Can you share any machine config for litexcnc?
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3 years 11 months ago - 3 years 11 months ago #257893 by TOLP2
In the documentation I included now examples for the 5A-75B, with in total 6 configurations:
  • different version of the board (V6.1, V7.0 and V8.0)
combination of GPIO, PWM, StepGen and Encoders or GPIO only.

For the configuration I've added both indexed versions and named versions. In the named version the name of the pin is the physical position, i.e. pin j1:1 is pin 1 on the first connector. Tomorrow I'll upload some more examples for the 5A-75E. 

When compiling one of the examples I noticed timing issues when using 6 stepgens. Perhaps the board has to be throttled down to 25 MHz to meet the timing requirements. Timing wise the board can be throttled back way further. However this requires some changes on the pre-scaler of the stepgen. This one is now fixed for 400 kHz max step rate @ 50 MHz clock. I think the pre-scaler should be more flexible and automatically adapt itself when lower clock-speeds are used.
Last edit: 3 years 11 months ago by TOLP2. Reason: Added examples to documentation / timing issues
The following user(s) said Thank You: romanetz
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3 years 11 months ago - 3 years 11 months ago #257983 by romanetz
Can you share us your machine config? I can't understand (without deep penetration into the sources, heh) how to deal with velocity-cmd1 and velocity-cmd of stepgens, the same approach with acceleration. And, regarding S-curve implementation (which is, in fact, changing acceleration with some slope, not instantly) , do I need to modify motion planner and/or include some additional components into the signal path in HAL?
Also I've noticed some hang up of the boards when Linuxcnc failed to load and the driver has been terminated. After reconnection of ethernet cable, normal operation is restored.
And another trouble, maybe, mostly related to my setup - I see very many alerts informing me that apply time has been overwhelmed. in HAL statistics maximum read time reaches 23 msec, although in a latency test the jitter is in range of dozens of microseconds (max. 20 microsecond).
Last edit: 3 years 11 months ago by romanetz.
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3 years 11 months ago #257990 by TOLP2
At this moment I cannot reach my machine config, as I'm not able the coming days to go to the machine. For wiring up the stepgen I would like to refer to the manual , which gives on how to use the components pos2vel and stepgen together. This example should work out of the box. You can expand it to the number of stepgens required.

About the apply_time not met. You can ignore these messages for now. You will get teh warning one time on-screen, most likely due to a stretched cycle. I will update the source code whether the apply time is too slow or too fast. Maybe (not sure) it has to do with the reduced clock-speed of the FPGA.

Did you succeed to compile the JSON on your machine using the tools? How long did the build take? I'm building inside a Docker container and it takes ages....

 
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