I tried to compile 1.5.2 on trixie but easier said than done. While I could get around several configuration issues,
there were in the end too severe compilation problems (for me) that I gave up.
At least 1.5.2 doesn't compile out-of-the-box on trixie.
In theory the DC sync should be pretty insensitive to jitter and latency. It should tolerate perhaps 1/2 servo cycle time,
depending on the phase when data is sent to the slaves. It's enough that data arrives a bit before Sync0,
Sync0 then does the precision timing.
I also think the initial synchrony check delay is different from the DC sync issue.
I checked on my system and I do have a several-second delay still. Bad news.
Good news is that I can try to see what the problem is.
So far I have come to understand that it has to do with the initial value
of the "System time difference" in register 0x92c.
Here is a way to observe, don't need to wade through tons of lines of syslog entries:
Code:
watch -n0 "ethercat reg read -p2 -tsm32 0x92c"
-pn n is any of the DC slaves except the first one with the reference clock.
Before starting linuxcnc it has a low value from previous linuxcnc session.
Start linuxcnc it jumps to aorund 1000000 (1 ms) and slowly works its way to do single digits.
This is on a 2 kHz servo loop system. It takes some 3-4 seconds to work its way down
below the synchrony limit, and that's where the startup delay comes from.
Obvious question is "Where does the initial 1 ms System time difference come from?"
And it's always around 1 ms, if I wait a minute between linuxcnc starts or over night.
