LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)

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02 Aug 2024 14:19 #306742 by cornholio
When running within the context of Linuxcnc in a basic setup 21 byte packets are being sent via UDP back and forth at the servo thread speed of 1ms, now that 21 bytes doesn’t include the source & dest port and addresses.
If you have a look at the figures on the wiz net wiki you’ll see as packet size drops so does the overall throughput.
So it would be interesting to see how it would go sending smaller packets back and forth at 1ms intervals, as this would being replicating what the situation is when running Linuxcnc.
I will try and have a look but I’ve only access to Xilinx and Lattice stuff ATM. Tho I do have a few W5500 modules in 2 different formats.

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02 Aug 2024 14:29 #306743 by Mecanix

I’ve only access to Xilinx and Lattice stuff ATM.

Yeah standard .v clocking stuff. Just need to change your pinouts (pin mapping in the *cst, in it current format). 
That'd be awesome man. Let us know what you come up with when/if you can.

Have a good one [beer_cheers_emoji_here!]  

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02 Aug 2024 14:48 #306745 by Mecanix

If you have a look at the figures on the wiz net wiki you’ll see as packet size drops so does the overall throughput.
 

All I could find is the implementation and proposed data integrity stuff. I know you're past your daylight but when you have a chance tomorrow, see if you can find that bit of info you ref'ed and we'll talk to their engineer about it. See if we can flip a Magic Register to disable that supposedly/suspected throttling thingy...

Impl. Ref: docs.wiznet.io/Product/iEthernet/W5500/Application/udp

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02 Aug 2024 15:28 #306749 by meister
I did a test with the new w5500.v, initialization of the IP seems to work, I can ping.
but port 2390 is not open :( so I can't communicate with it either

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02 Aug 2024 15:43 #306754 by Mecanix

I did a test with the new w5500.v, initialization of the IP seems to work, I can ping.
but port 2390 is not open :( so I can't communicate with it either

Snap, that can't be good. Wonder if the socket got opened correctly... need a look at. More and more I think about it though, let's just 'fuck it' (pardon!) and go full 1000 gaga-bit phy/mac from the ground up. Placed my original idea/proposition on order, should get in here in about 72hrs. 

I'll schematic the rtl8211 silicon and passives for you, pass on BOM, and contribute a 100/1000 verilog for RIO tests soon. 

 

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02 Aug 2024 15:49 - 02 Aug 2024 15:51 #306755 by Mecanix
In a meantime, you can Find string "~~~required?~~~" and uncomment everything that is commented related to destination addr/port. Set your computer address for the dest and port 6000. Probably what's going on.
Last edit: 02 Aug 2024 15:51 by Mecanix.

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02 Aug 2024 17:14 #306764 by meister
puhh, realy gigabit ? hmm, if it's work

i can run LAN8720 & RTL8201F on the tangprimer, so there is allready code for it as a base


at the moment, i try to debug a little bit the old w5500 driver and found out that it do not receive the last package
The following user(s) said Thank You: Mecanix

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02 Aug 2024 17:20 #306766 by Mecanix
@meister 

A 1000 meg base ethernet/phy onto "rgmii_txc & rgmii_rxc" buffers. Have a look and let us know if RIO can deal these two buffers. 
Let's get this lag over with and league up a notch! 

Synthesized, Placed and Routed Code in hands. If interested, DM an address I can send bitstream source too [16mb]. 
RTL8211FD Schematic attached (pdf). Same real-estate as the wizzy part, 10x performance increase though.


 
Attachments:

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02 Aug 2024 17:24 - 02 Aug 2024 17:25 #306767 by Mecanix

at the moment, i try to debug a little bit the old w5500 driver and found out that it do not receive the last package
 

I'll standby. That's awesome news to hear, I know you'll figure it out with time. Oh man!!

ps. yes gigabit phy. Correct. If you need the bitstream, shoot an addy I can email -or- a drag & drop box. 
Last edit: 02 Aug 2024 17:25 by Mecanix.

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02 Aug 2024 18:17 #306774 by meister
we have 2 buffers like this:

reg [31:0] tx_data;
reg [31:0] rx_data;

when a packet is received on port 2390 (UDP),
it should be written to rx_data and the data from tx_data
directly send back to the sender.

thats all in the first step.

later we need a check if the received package have the correct ID


I am one step further with the w5500,
the problem is here:
        end else if (state == STATE_RX_START) begin
            rx_buffer_read_pointer <= rx_buffer_read_pointer + data_read[7:0];


            if (rx_size == (BUFFER_SIZE_RX+HEADER_SIZE)) begin

                stat <= 3;

                rx_buffer_valid <= 1;
                current_instruction <= {8'd0, rx_buffer_read_pointer, BSB_S0_RX_RWB_READ};
                spi_clk <= 1'b0;
                state <= STATE_PULLING_DATA;
                spi_chip_select_n <= 1'b0;
                spi_clock_count <= 10'd0;
                is_busy <= 1'b1;
            end else begin

                stat <= rx_size;

                rx_buffer_valid <= 0;
                state <= STATE_RX_WRITE_PTR1;
                is_busy <= 1'b1;
            end

rx_size is only 8bit, so it will not send back a package and then we get the timeout
....

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