LinuxCNC-RIO - RealtimeIO for LinuxCNC based on FPGA (ICE40 / ECP5)

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2 months 2 weeks ago #348667 by meister
Sometimes it can be an advantage to be a bit lazy :)
Otherwise, I wouldn’t have been able to reproduce it.
At first, I had the driver connected directly to the TangNano9k (3.3V),
then I had a quick Google to see if anyone else was having problems with the DM542. Yes, they were, because of the 3.3V. Now I’ve connected it to the Tangoboard with 5V signals and everything’s working perfectly, with the default settings

www.youtube.com/shorts/3IeqAu58WdI

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2 months 2 weeks ago #348673 by viewsat
Is your DM542 input pin connected like this?
 

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2 months 2 weeks ago - 2 months 2 weeks ago #348679 by viewsat
My DM542 input pins are connected like this. I've used this DM542 driver on approximately 1000 units. I've used it on Linuxcnc LPT, Mesa 7i92, and Grbl 1.1 controllers without encountering any positioning error issues.
 
Last edit: 2 months 2 weeks ago by viewsat.

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2 months 2 weeks ago #348680 by viewsat
From what I see in your video, the connection is like this: PUL+ and DIR+ are not connected.
 

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2 months 2 weeks ago - 2 months 2 weeks ago #348681 by viewsat
If I replace the DIR PC817 optocoupler with a high-speed 6N137, it can correctly return to the zero position.   
However, using grbl and mesa 7i92 does not require modifying the DIR pc817.
I may need to use a logic analyzer to observe the timing diagrams of the Tang Nano 9k output pulses and DIR
I'm from Taipei, Taiwan, and my English isn't very good.

 
Last edit: 2 months 2 weeks ago by viewsat.

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2 months 2 weeks ago #348683 by tuxcnc

If I replace the DIR PC817 optocoupler with a high-speed 6N137, it can correctly return to the zero position. 
This is wrong way.
By modifying the driver, you risk damaging it and reducing its reliability.
Although the PC817 has a very low bandwidth, the correct solution is to increase the dirhold.

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