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1 Yes
2 Yes
3 Yes
4 Yes, if you do not use any encoders
5 Yes

Hi all,Thanks in advance to everyone who responds!I’m using the following HostMot2 bitfile for my Mesa 7i92:

BoardName : MESA7I92
FPGA Size: 9 KGates
FPGA Pins: 144
Number of IO Ports: 2
Width of one I/O port: 17
Clock Low frequency: 100.0000 MHz
Clock High frequency: 200.0000 MHz
IDROM Type: 3
Instance Stride 0: 4
Instance Stride 1: 64
Register Stride 0: 256
Register Stride 1: 256

Modules in configuration:

Module: DPLL
There are 1 of DPLL in configuration
Version: 0
Registers: 7
BaseAddress: 7000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: WatchDog
There are 1 of WatchDog in configuration
Version: 0
Registers: 3
BaseAddress: 0C00
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: IOPort
There are 2 of IOPort in configuration
Version: 0
Registers: 5
BaseAddress: 1000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: QCount
There are 6 of QCount in configuration
Version: 2
Registers: 5
BaseAddress: 3000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: StepGen
There are 5 of StepGen in configuration
Version: 2
Registers: 10
BaseAddress: 2000
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: PWM
There are 1 of PWM in configuration
Version: 0
Registers: 5
BaseAddress: 4100
ClockFrequency: 200.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Module: LED
There are 1 of LED in configuration
Version: 0
Registers: 1
BaseAddress: 0200
ClockFrequency: 100.000 MHz
Register Stride: 256 bytes
Instance Stride: 4 bytes

Configuration pin-out:

IO Connections for P2
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 1      0   IOPort       PWM              0        PWM             (Out)
14      1   IOPort       None           
 2      2   IOPort       StepGen          0        Step/Table1     (Out)
15      3   IOPort       None           
 3      4   IOPort       StepGen          0        Dir/Table2      (Out)
16      5   IOPort       StepGen          4        Step/Table1     (Out)
 4      6   IOPort       StepGen          1        Step/Table1     (Out)
17      7   IOPort       StepGen          4        Dir/Table2      (Out)
 5      8   IOPort       StepGen          1        Dir/Table2      (Out)
 6      9   IOPort       StepGen          2        Step/Table1     (Out)
 7     10   IOPort       StepGen          2        Dir/Table2      (Out)
 8     11   IOPort       StepGen          3        Step/Table1     (Out)
 9     12   IOPort       StepGen          3        Dir/Table2      (Out)
10     13   IOPort       None           
11     14   IOPort       QCount           0        Quad-A          (In)
12     15   IOPort       QCount           0        Quad-B          (In)
13     16   IOPort       QCount           0        Quad-IDX        (In)

IO Connections for P1
Pin#  I/O   Pri. func    Sec. func       Chan      Pin func        Pin Dir

 1     17   IOPort       QCount           1        Quad-A          (In)
14     18   IOPort       QCount           1        Quad-B          (In)
 2     19   IOPort       QCount           1        Quad-IDX        (In)
15     20   IOPort       QCount           2        Quad-A          (In)
 3     21   IOPort       QCount           2        Quad-B          (In)
16     22   IOPort       QCount           2        Quad-IDX        (In)
 4     23   IOPort       QCount           3        Quad-A          (In)
17     24   IOPort       QCount           3        Quad-B          (In)
 5     25   IOPort       QCount           3        Quad-IDX        (In)
 6     26   IOPort       QCount           4        Quad-A          (In)
 7     27   IOPort       QCount           4        Quad-B          (In)
 8     28   IOPort       QCount           4        Quad-IDX        (In)
 9     29   IOPort       QCount           5        Quad-A          (In)
10     30   IOPort       QCount           5        Quad-B          (In)
11     31   IOPort       QCount           5        Quad-IDX        (In)
12     32   IOPort       None           
13     33   IOPort       None         

   

1. I only need 4 axes (X, Y1, Y2, Z). Can I use the last StepGen for torch on and laser pointer outputs?
2. I do not need encoders. Can I use the QCount pins as general-purpose inputs?
3. Can I use the pins labeled “None” or “unassigned” in the bitfile as inputs or outputs, depending on their pin direction?For example, pins 10 and 15 as inputs, and pin 14 as output?
4. Are pins 13 and 15 on P2 free to use as I/O?
5. My breakout board has 5 inputs labeled P10, P11, P12, P13, and P15. Can I use all of them as inputs

thanks again to everyone who helps!Best regards,
 

yes, I just needed to make sure

Info : By measuring I found that between the encoder inputs A-A/,B-B/,Z-Z/ there is a resistance of 120 Ohm, they are already integrated in the MESA card. So additional resistors are not needed. I did not find information about this in the manual

I need to work more organized!! 

Thank you for all the help you gave me!!! I am going out to configure the VFD so I can finish the machine, I am under a lot of pressure!! Thank you!!!!!

 EDIT: 
tested functionality: step-dir servo X,Y,Z
step-dir spindle
MPG


untested:
probe
limit switch
linear ruler and encoder spindle

it is possible to configure all these functions on the 7i95T board using PNCCONFG  in LinuxCNC 2.10 (with the need for simple manual editing of the HAL file for MPG -axes switch)


not yet tested - I'm worried that I connected it wrong - it's my first experience with MESA
I'd be happy for any comments
 

I'm not sure if I should ground the shielding of the servo motor data cables to the MESA board - the drivers are already grounded via the ground wire from the ~ 230 V power supply and a ground loop is created, which could cause EMC interference
 


more details on my channel :
www.youtube.com/channel/UC_zOVvs96VKX6R_DIO5KyJg






 

 

 

Initially I was considering using a RPi5, but my intention is for LCNC to be networked and not host the UI, instead I would use the second nic to recieve individual commands or whole files if/when needed.

There are hats, but it seems it is likely easier to get a PC, there have been some topics but it has been some time since then, does anyone have recommendations for the smallest formfactor solution with dual NIC? Ideally we would be priced similar to RPi, but I would be happy <€300.

(I know it was a few years ago but in the Marco reps video it seemed that he had a ncie solution, but I couldn't find details on his).

I just found this on AliExpress: Please help me choose!
$16.15 | MACH3 Charge Pump Module, Delay Control Module, 2 Pulse Delay Control Sensor
a.aliexpress.com/_mt0MzMv

Why is your DVM on the floor ???

A picture or link to the actual breakout board you have would be helpful.

As tommylight noted, the common "5 Axis CNC" breakout has 12 outputs
and 5 inputs and this is fixed by the breakout board hardware.

 

It works!!!! The VFD was not sending the voltage!!!.PCW ,Tommyligth,unknowm !!! thank you very much from the heart!!!He learned a great lesson today!! it works !!

Any stepgen or encoder that is not in use, it's pins can be used as IO, so if you just load
loadrt num_stepgens = 4
that will enable 4 stepgens on the first port (no idea exactly if P1 or P2) and the rest of the 26 pins can be used freely as inputs or as outputs.
Use
mesaflash --card_name --IP --readhmid
replace name and IP with what you have and check the resulting pin assignment so you can decide how many stepgens and encoders you need and what pins they use, from that you know what pin numbers remain for inputs and outputs.
BUT, since you are using BOB's, you will be limited to what the BOB uses as inputs ( 10 in total for encoders and switches) and 24 as outputs.

Yes, I'm using the common 5-axis BOBs from china, one on each port (P1 and P2).
That said, I don’t actually need all 10 StepGen channels. My machine only uses 4 axes, so I’m hoping to free up many of the StepGen-related I/O pins and use them as general-purpose I/Os instead.

Also, since the 7i92 headers are mirrored (P1 and P2), both BOBs give access to the same type of GPIO pins. I’m hoping to take advantage of that symmetry and assign more pins for inputs (e.g., limit switches, ArcOK, ohmic probe, thc UP /down etc.), and just a few for outputs (torch on/off, float switch reset, laser etc.).

Ideally, I'd like a bitfile that allows:

At least 10 inputs and 5 outputs for general machine control

Fewer StepGen channels (maybe 4 or 5 max)

If a bitfile like that exists — or if modifying an existing one is straightforward — I’d really appreciate the guidance.

Thanks again for your help!

Best regards,

PncConf works in Live!!!!! it was the language !!!!!!!!!! I am very happy!!!! thank you!!!!!!!!

I continue now with the VFD!!!

Thank you!!!!!!!!!!

Thank you all for the responses. The VFD GA500 is already installed in the machine and I don’t have it here. I have an LS600 on my work desk which I am using for the tests. I will try to send you the information you are requesting as soon as possible.

PCW !. Thank you for coming back! From the heart!

I advance the board that I am using in the TB4 connector, I believe, as PCW explains, that I am not supplying the 10vcc. I am going to check the LS600.

 

There is no tension on pins (1-2) (1-3) of the TB4

That means no Spindle output is possible.

The 7I76/7I76E/7I76EU do not supply the 10V.
The spindle output on these cards works as a
potentiometer. Typically the 10V is supplied by
the VFD.